ATTINY26L-8SU Atmel, ATTINY26L-8SU Datasheet - Page 105

• Manufacturer Part Number: ATTINY26L-8SU
• Description: ID MCU AVR 2K 5V 8MHZ 20-SOIC
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY26L-8SU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 2KB (1K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (7.5mm Width)
• Package: 20SOIC
• Device Core: AVR
• Family Name: ATtiny
• Maximum Speed: 8 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 16
• Interface Type: SPI/USI
• On-chip Adc: 11-chx10-bit
• Number Of Timers: 2
• Cpu Family: ATtiny
• Device Core Size: 8b
• Frequency (max): 8MHz
• Total Internal Ram Size: 128Byte
• # I/os (max): 16
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 20
• Package Type: SOIC
• Processor Series: ATTINY2x
• Core: AVR8
• Data Ram Size: 128 B
• Maximum Clock Frequency: 8 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• For Use With: ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK505 - ADAPTER KIT FOR 14PIN AVR MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATTINY26L-8SJ; ATTINY26L-8SJ

Scanning Multiple
Channels
ADC Noise
Canceling
Techniques
Offset
Compensation
Schemes
1477K–AVR–08/10
Since change of analog channel always is delayed until a conversion is finished, the Free Run-
ning mode can be used to scan multiple channels without interrupting the converter. Typically,
the ADC Conversion Complete interrupt will be used to perform the channel shift. However, the
user should take the following fact into consideration:
Digital circuitry inside and outside the ATtiny26(L) generates EMI which might affect the accu-
racy of analog measurements. If conversion accuracy is critical, the noise level can be reduced
by applying the following techniques:
1. The analog part of the ATtiny26(L) and all analog components in the application should
2. Keep analog signal paths as short as possible. Make sure analog tracks run over the
3. The AVCC pin on the ATtiny26(L) should be connected to the digital V
4. Use the ADC noise canceler function to reduce induced noise from the CPU.
5. If some pins are used as digital outputs, it is essential that these do not switch while a
The gain stage has a built-in offset cancellation circuitry that nulls the offset of differential mea-
surements as much as possible. The remaining offset in the analog path can be measured
directly by selecting the same channel for both differential inputs. This offset residue can be then
subtracted in software from the measurement results. Using this kind of software based offset
correction, offset on any channel can be reduced below one LSB.
The interrupt triggers once the result is ready to be read. In Free Running mode, the next
conversioin will start immediately when the interrupt triggers. If ADMUX is changed after the
interrupt triggers, the next conversion has already started, and the old setting is used.
have a separate analog ground plane on the PCB. This ground plane is connected to the
digital ground plane via a single point on the PCB.
analog ground plane, and keep them well away from high-speed switching digital tracks.
via an LC network as shown in Figure 57.
conversion is in progress in that port.
CC
supply voltage
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