ATTINY26L-8SU Atmel, ATTINY26L-8SU Datasheet - Page 57

ID MCU AVR 2K 5V 8MHZ 20-SOIC

ATTINY26L-8SU

Manufacturer Part Number
ATTINY26L-8SU
Description
ID MCU AVR 2K 5V 8MHZ 20-SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY26L-8SU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Package
20SOIC
Device Core
AVR
Family Name
ATtiny
Maximum Speed
8 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
16
Interface Type
SPI/USI
On-chip Adc
11-chx10-bit
Number Of Timers
2
Cpu Family
ATtiny
Device Core Size
8b
Frequency (max)
8MHz
Total Internal Ram Size
128Byte
# I/os (max)
16
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Package Type
SOIC
Processor Series
ATTINY2x
Core
AVR8
Data Ram Size
128 B
Maximum Clock Frequency
8 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
For Use With
ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK505 - ADAPTER KIT FOR 14PIN AVR MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ATTINY26L-8SJ
ATTINY26L-8SJ

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Interrupts
Interrupt Vectors
1477K–AVR–08/10
The ATtiny26(L) provides eleven interrupt sources. These interrupts and the separate Reset
Vector, each have a separate program vector in the program memory space. All the interrupts
are assigned individual enable bits which must be set (one) together with the I-bit in the Status
Register in order to enable the interrupt.
The lowest addresses in the program memory space are automatically defined as the Reset and
Interrupt vectors. The complete list of vectors is shown in Table 29. The list also determines the
priority levels of the different interrupts. The lower the address the higher is the priority level.
RESET has the highest priority, and next is INT0 – the External Interrupt Request 0 etc.
Table 29. Reset and Interrupt Vectors
The most typical and general program setup for the Reset and Interrupt Vector Addresses are:
Vector No
Address Labels
$000
$001
$002
$003
$004
$005
$006
$007
$008
$009
$00A
$00B
;
$009
$00A
$00B
A
B
C
1
2
3
4
5
6
7
8
9
RESET:
Program Address
$00A
$00B
$000
$001
$002
$003
$004
$005
$006
$007
$008
$009
Code
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
ldi
out
sei
RESET
EXT_INT0
PIN_CHANGE
TIM1_CMP1A
TIM1_CMP1B
TIM1_OVF
TIM0_OVF
USI_STRT
USI_OVF
EE_RDY
ANA_COMP
ADC
r16, RAMEND
SP, r16
Source
RESET
INT0
I/O Pins
TIMER1, CMPA
TIMER1, CMPB
TIMER1, OVF1
TIMER0, OVF0
USI_STRT
USI_OVF
EE_RDY
ANA_COMP
ADC
Comments
; Reset handler
; IRQ0 handler
; Pin change handler
; Timer1 compare match 1A
; Timer1 compare match 1B
; Timer1 overflow handler
; Timer0 overflow handler
; USI Start handler
; USI Overflow handler
; EEPROM Ready handler
; Analog Comparator handler
; ADC Conversion Handler
; Main program start
Interrupt Definition
Hardware Pin and Watchdog Reset
External Interrupt Request 0
Pin Change Interrupt
Timer/Counter1 Compare Match 1A
Timer/Counter1 Compare Match 1B
Timer/Counter1 Overflow
Timer/Counter0 Overflow
USI Start
USI Overflow
EEPROM Ready
Analog Comparator
ADC Conversion Complete
57

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