AT90USB162-16MU Atmel, AT90USB162-16MU Datasheet - Page 207

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AT90USB162-16MU

Manufacturer Part Number
AT90USB162-16MU
Description
MCU AVR USB 16K FLASH 32-QFN
Manufacturer
Atmel
Series
AVR® 90USBr
Datasheets

Specifications of AT90USB162-16MU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, PS/2, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFN
Controller Family/series
AVR USB
No. Of I/o's
22
Eeprom Memory Size
512Byte
Ram Memory Size
512Byte
Cpu Speed
16MHz
Rohs Compliant
Yes
Processor Series
AT90USBx
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SPI, USART, debugWIRE
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
22
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATSTK525, ATSTK526, ATAVRISP2, ATAVRONEKIT, AT90USBKEY, ATEVK525
Minimum Operating Temperature
- 40 C
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK526 - KIT STARTER FOR AT90USB82/162ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK525 - KIT STARTER FOR AT90USBAT90USBKEY2 - KIT DEMO FOR AT90USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
 Details

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7707A–AVR–01/07
• RSTDT - Reset Data Toggle Bit
Set to automatically clear the data toggle sequence:
For OUT endpoint: the next received packet will have the data toggle 0.
For IN endpoint: the next packet to be sent will have the data toggle 0.
Cleared by hardware instantaneously. The firmware does not have to wait that the bit is cleared.
Clearing by software has no effect.
• 2 - Reserved
The value read from these bits is always 0. Do not set these bits.
• 1 - Reserved
The value read from these bits is always 0. Do not set these bits.
• 0 - EPEN - Endpoint Enable Bit
Set to enable the endpoint according to the device configuration. Endpoint 0 shall always be
enabled after a hardware or USB reset and participate in the device configuration.
Clear this bit to disable the endpoint. See Section , page 193 for more details.
• 7-6 - EPTYPE1:0 - Endpoint Type Bits
Set this bit according to the endpoint configuration:
00b: Control10b: Bulk
01b: Isochronous11b: Interrupt
• 5-1 - Reserved
The value read from these bits is always 0. Do not set these bits.
• 0 - EPDIR - Endpoint Direction Bit
Set to configure an IN direction for bulk, interrupt or isochronous endpoints.
Clear to configure an OUT direction for bulk, interrupt, isochronous or control endpoints.
• 7 - Reserved
The value read from these bits is always 0. Do not set these bits.
• 6-4 - EPSIZE2:0 - Endpoint Size Bits
Set this bit according to the endpoint size:
000b: 8 bytes
Bit
Read/W
rite
Initial
Value
Bit
Read/W
rite
Initial
Value
7
EPTYPE1:0
R/W
0
7
-
R
0
6
R/W
0
6
EPSIZE2:0
R/W
0
5
-
R
0
5
R/W
0
4
-
R
0
4
R/W
0
3
-
R
0
3
EPBK1:0
R/W
0
2
-
R
0
2
R/W
0
1
-
R
0
1
ALLOC
R/W
0
0
EPDIR
R/W
0
0
-
R
0
UECFG0X
UECFG1X
207

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