AT90USB162-16MU Atmel, AT90USB162-16MU Datasheet - Page 36

• Manufacturer Part Number: AT90USB162-16MU
• Description: MCU AVR USB 16K FLASH 32-QFN
• Manufacturer: Atmel
• Series: AVR® 90USBr

Specifications of AT90USB162-16MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, PS/2, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-TQFN
• Controller Family/series: AVR USB
• No. Of I/o's: 22
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 512Byte
• Cpu Speed: 16MHz
• Rohs Compliant: Yes
• Processor Series: AT90USBx
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI, USART, debugWIRE
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATSTK525, ATSTK526, ATAVRISP2, ATAVRONEKIT, AT90USBKEY, ATEVK525
• Minimum Operating Temperature: - 40 C
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK526 - KIT STARTER FOR AT90USB82/162ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK525 - KIT STARTER FOR AT90USBAT90USBKEY2 - KIT DEMO FOR AT90USB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Details

PLL
Internal PLL for USB
interface
PLL Control and
Status Register –
PLLCSR
36
The PLL is used to generate internal high frequency (48 MHz) clock for USB interface, the PLL
input is generated from an external low-frequency (the crystal oscillator or external clock input
pin from XTAL1).
The internal PLL in AT90USB82/162 generates a clock frequency that is 6x multiplied from nom-
inally 8 MHz input. The source of the 8 MHz PLL input clock is the output of the internal PLL
clock prescaler that generates the 8 MHz.
Figure 16. PLL Clocking System
• Bit 7..5 – Res: Reserved Bits
These bits are reserved bits in the AT90USB82/162 and always read as zero.
• Bit 4..2 – PLLP2:0 PLL prescaler
These bits allow to configure the PLL input prescaler to generate the 8MHz input clock for the
PLL.
Table 12. PLL input prescaler configurations
Bit
$29 ($29)
Read/Write
Initial Value
PLLP2
0
0
0
0
1
XTAL2
XTAL1
7
R
0
PLLP1
XTAL
0
0
1
1
0
0
6
R
Clock Mux (fuse)
Clock Switch
PLL clock
Prescaler
Ext.
5
R
0
PLLP0
0
1
0
1
0
Int RC
8MHz.
4
PLLP2
R
0
clk
8MHz
3
PLLP1
R
0
Clock Division Factor
PLLE
PLL
6x
0
Reserved
Reserved
Reserved
2
PLLP0
R
1
2
Detector
Lock
1
PLLE
R/W
0/1
PLOCK
0
PLOCK
R
0
PLLCSR
clk USB (48MHz)
System Clock
7707A–AVR–01/07