ATMEGA64A-AU Atmel, ATMEGA64A-AU Datasheet - Page 33

MCU AVR 64K ISP FLASH 64-TQFP

ATMEGA64A-AU

Manufacturer Part Number
ATMEGA64A-AU
Description
MCU AVR 64K ISP FLASH 64-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA64A-AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Package
64TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
53
Interface Type
SPI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
4
Processor Series
ATMEGA64x
Core
AVR8
Data Ram Size
4 KB
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
Cpu Family
ATmega
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
4KB
# I/os (max)
53
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
TQFP
For Use With
770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA64A-AU
Manufacturer:
ATMEL
Quantity:
4 500
Part Number:
ATMEGA64A-AU
Manufacturer:
Atmel
Quantity:
900
Part Number:
ATMEGA64A-AU
Manufacturer:
ATMEL85
Quantity:
900
Part Number:
ATMEGA64A-AU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATMEGA64A-AU
Manufacturer:
ATMEL
Quantity:
8 000
Part Number:
ATMEGA64A-AU
Manufacturer:
AT
Quantity:
20 000
Company:
Part Number:
ATMEGA64A-AU
Quantity:
1 920
Company:
Part Number:
ATMEGA64A-AU
Quantity:
1 850
Company:
Part Number:
ATMEGA64A-AU
Quantity:
1 800
Company:
Part Number:
ATMEGA64A-AU
Quantity:
267
Company:
Part Number:
ATMEGA64A-AU
Quantity:
257
Part Number:
ATMEGA64A-AUR
Manufacturer:
Atmel
Quantity:
10 000
7.6.5
7.6.6
8160C–AVR–07/09
EEDR – EEPROM Data Register
EECR – EEPROM Control Register
• Bits 15:11 – Res: Reserved Bits
These are reserved bits and will always read as zero. When writing to this address location,
write these bits to zero for compatibility with future devices.
• Bits 10:0 – EEAR10:0: EEPROM Address
The EEPROM Address Registers – EEARH and EEARL specify the EEPROM address in the 2K
bytes EEPROM space. The EEPROM data bytes are addressed linearly between 0 and 2,048.
The Initial Value of EEAR is undefined. A proper value must be written before the EEPROM may
be accessed.
• Bits 7:0 – EEDR7.0: EEPROM Data
For the EEPROM write operation, the EEDR Register contains the data to be written to the
EEPROM in the address given by the EEAR Register. For the EEPROM read operation, the
EEDR contains the data read out from the EEPROM at the address given by EEAR.
• Bits 7:4 – Res: Reserved Bits
These bits are reserved bits in the ATmega64A and will always read as zero.
• Bit 3 – EERIE: EEPROM Ready Interrupt Enable
Writing EERIE to one enables the EEPROM Ready Interrupt if the I-bit in SREG is set. Writing
EERIE to zero disables the interrupt. The EEPROM Ready Interrupt generates a constant inter-
rupt when EEWE is cleared.
• Bit 2 – EEMWE: EEPROM Master Write Enable
The EEMWE bit determines whether setting EEWE to one causes the EEPROM to be written.
When EEMWE is written to one, writing EEWE to one within four clock cycles will write data to
the EEPROM at the selected address. If EEMWE is zero, writing EEWE to one will have no
effect. When EEMWE has been written to one by software, hardware clears the bit to zero after
four clock cycles. See the description of the EEWE bit for an EEPROM write procedure.
• Bit 1 – EEWE: EEPROM Write Enable
The EEPROM Write Enable Signal EEWE is the write strobe to the EEPROM. When address
and data are correctly set up, the EEWE bit must be set to write the value into the EEPROM.
The EEMWE bit must be set when the logical one is written to EEWE, otherwise no EEPROM
write takes place. The following procedure should be followed when writing the EEPROM (the
order of steps 3 and 4 is not essential):
Bit
0x1D (0x3D)
Read/Write
Initial Value
Bit
0x1C (0x3C)
Read/Write
Initial Value
MSB
R/W
R
7
0
7
0
R/W
R
6
0
6
0
R/W
R
5
0
5
0
R/W
R
4
0
4
0
EERIE
R/W
R/W
3
0
3
0
EEMWE
R/W
R/W
2
0
2
0
EEWE
R/W
R/W
1
0
1
X
ATmega64A
EERE
LSB
R/W
R/W
0
0
0
0
EEDR
EECR
33

Related parts for ATMEGA64A-AU