ATMEGA64A-AU Atmel, ATMEGA64A-AU Datasheet - Page 54

MCU AVR 64K ISP FLASH 64-TQFP

ATMEGA64A-AU

Manufacturer Part Number
ATMEGA64A-AU
Description
MCU AVR 64K ISP FLASH 64-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA64A-AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Package
64TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
53
Interface Type
SPI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
4
Processor Series
ATMEGA64x
Core
AVR8
Data Ram Size
4 KB
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
Cpu Family
ATmega
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
4KB
# I/os (max)
53
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
TQFP
For Use With
770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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10.0.5
10.0.6
8160C–AVR–07/09
Brown-out Detection
Watchdog Reset
ATmega64A has an On-chip Brown-out Detection (BOD) circuit for monitoring the V
ing operation by comparing it to a fixed trigger level. The trigger level for the BOD can be
selected by the fuse BODLEVEL to be 2.7V (BODLEVEL unprogrammed), or 4.0V (BODLEVEL
programmed). The trigger level has a hysteresis to ensure spike free Brown-out Detection. The
hysteresis on the detection level should be interpreted as V
V
The BOD circuit can be enabled/disabled by the fuse BODEN. When the BOD is enabled
(BODEN programmed), and V
5), the Brown-out Reset is immediately activated. When V
(V
expired.
The BOD circuit will only detect a drop in V
ger than t
Figure 10-5. Borwn-out Reset During Operation
When the Watchdog times out, it will generate a short reset pulse of one CK cycle duration. On
the falling edge of this pulse, the delay timer starts counting the Time-out period t
page 55
BOT
BOT+
- V
INTERNAL
TIME-OUT
in
HYST
for details on operation of the Watchdog Timer.
BOD
Figure
RESET
RESET
V
/2.
given in
CC
10-5), the delay counter starts the MCU after the Time-out period t
Table
28-3.
CC
decreases to a value below the trigger level (V
V
BOT-
CC
if the voltage stays below the trigger level for lon-
CC
BOT+
increases above the trigger level
V
t
= V
TOUT
BOT+
BOT
ATmega64A
+ V
HYST
BOT-
/2 and V
TOUT
in
CC
Figure 10-
. Refer to
level dur-
TOUT
BOT-
has
54
=

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