AT32UC3A3128-ALUT Atmel, AT32UC3A3128-ALUT Datasheet - Page 506
![IC MCU 128KB FLASH 144LQFP](/photos/6/72/67244/144l1-lqfp_sml.jpg)
AT32UC3A3128-ALUT
Manufacturer Part Number
AT32UC3A3128-ALUT
Description
IC MCU 128KB FLASH 144LQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Specifications of AT32UC3A3128-ALUT
Core Processor
AVR
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, WDT
Number Of I /o
110
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
96 KB
Interface Type
IrDA/SCI/SCIF/UDI
Maximum Clock Frequency
66 MHz
Number Of Timers
3
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1104
Minimum Operating Temperature
- 40 C
Controller Family/series
AT32UC3A
No. Of I/o's
109
Ram Memory Size
32KB
Cpu Speed
66MHz
No. Of Timers
1
Rohs Compliant
Yes
For Use With
ATEVK1104 - KIT DEV/EVAL FOR AVR32 AT32UC3AATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3A3128-ALUT
Manufacturer:
Atmel
Quantity:
135
- Current page: 506 of 1014
- Download datasheet (16Mb)
Figure 24-3. SSC Functional Block Diagram
24.7.1
32072C–AVR32–2010/03
Peripheral
CLK_SSC
Clock Management
Bus
DMA
Interface
Divider
Clock
User
Interrupt Controller
The transmitter clock can be generated by:
The receiver clock can be generated by:
Furthermore, the transmitter block can generate an external clock on the TX_CLOCK pin, and
the receiver block can generate an external clock on the RX_CLOCK pin.
This allows the SSC to support many Master and Slave Mode data transfers.
Interrupt Control
• an external clock received on the TX_CLOCK pin
• the receiver clock
• the internal clock divider
• an external clock received on the RX_CLOCK pin
• the transmitter clock
• the internal clock divider
TX_FRAME_SYNC
RX_FRAME_SYNC
TX_FRAME_SYNC
RX_FRAME_SYNC
TX_CLOCK Input
RX_CLOCK
TX clock
RX clock
Input
Selector
Selector
Start
TX_DMA
Start
RX_DMA
Load Shift
Load Shift
Transmitter
Transmit Clock
Receive Clock
Controller
Controller
Receiver
Transmit Holding
Receive Holding
Register
Register
Transmit Shift Register
Receive Shift Register
RX clock
TX clock
Holding Register
Holding Register
Transmit Sync
Receive Sync
Clock Output
Clock Output
Frame Sync
Frame Sync
Controller
Controller
Controller
Controller
AT32UC3A3/A4
TX_CLOCK
RX_CLOCK
RX_FRAME_SYNC
TX_FRAME_SYNC
RX_DATA
TX_DATA
506
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