AT32UC3A3128-ALUT Atmel, AT32UC3A3128-ALUT Datasheet - Page 908
![IC MCU 128KB FLASH 144LQFP](/photos/6/72/67244/144l1-lqfp_sml.jpg)
AT32UC3A3128-ALUT
Manufacturer Part Number
AT32UC3A3128-ALUT
Description
IC MCU 128KB FLASH 144LQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Specifications of AT32UC3A3128-ALUT
Core Processor
AVR
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, WDT
Number Of I /o
110
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
96 KB
Interface Type
IrDA/SCI/SCIF/UDI
Maximum Clock Frequency
66 MHz
Number Of Timers
3
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1104
Minimum Operating Temperature
- 40 C
Controller Family/series
AT32UC3A
No. Of I/o's
109
Ram Memory Size
32KB
Cpu Speed
66MHz
No. Of Timers
1
Rohs Compliant
Yes
For Use With
ATEVK1104 - KIT DEV/EVAL FOR AVR32 AT32UC3AATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3A3128-ALUT
Manufacturer:
Atmel
Quantity:
135
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32.5.6
Name:
Access Type:
Offset:
Reset Value:
• URAT: Unspecified Register Access Type:
• URAD: Unspecified Register Access Detection Status
•
•
•
•
32072C–AVR32–2010/03
Others
URAT
31
23
15
7
-
-
-
0
1
2
3
4
5
Only the last Unspecified Register Access Type is available through the URAT field.
This field is reset to 0 when SWRST bit in the Control Register is written to one.
This bit is set when at least one unspecified register access has been detected since the last software reset.
This bit is cleared when SWRST bit in the Control Register is set to one.
Interrupt Status Register
Description
The IDATAnR register during the data processing in DMA mode.
The ODATAnR register read during the data processing.
The MR register written during the data processing.
The ODATAnR register read during the sub-keys generation.
The MR register written during the sub-keys generation.
Write-only register read access.
Reserved
30
22
14
6
-
-
-
ISR
Read-only
0x1C
0x0000001E
URAT
29
21
13
5
-
-
-
28
20
12
4
-
-
-
27
19
11
3
-
-
-
-
26
18
10
2
-
-
-
-
AT32UC3A3/A4
25
17
9
1
-
-
-
-
DATRDY
URAD
24
16
8
0
-
-
908
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