AT91SAM7SE32-AU Atmel, AT91SAM7SE32-AU Datasheet - Page 218

MCU ARM 32K HS FLASH 128-LQFP

AT91SAM7SE32-AU

Manufacturer Part Number
AT91SAM7SE32-AU
Description
MCU ARM 32K HS FLASH 128-LQFP
Manufacturer
Atmel
Series
AT91SAMr

Specifications of AT91SAM7SE32-AU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
EBI/EMI, I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
88
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-LQFP
Controller Family/series
AT91SAM7xxxx
No. Of I/o's
88
Ram Memory Size
8KB
Cpu Speed
48MHz
No. Of Timers
3
Rohs Compliant
Yes
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
EBI, SPI, TWI, USART
Maximum Clock Frequency
55 MHz
Number Of Programmable I/os
88
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, KSK-AT91SAM7S-PL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7SE-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
AT91SAM7SE-EK - EVAL BOARD FOR AT91SAM7SEAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM7SE32-AU
Manufacturer:
ATMEL
Quantity:
624
Part Number:
AT91SAM7SE32-AU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
AT91SAM7SE32-AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
23.7.6
Register Name:
Access Type:
• RES: Refresh Error Status
0: No effect.
1: Enables the refresh error interrupt.
23.7.7
Register Name:
Access Type:
• RES: Refresh Error Status
0: No effect.
1: Disables the refresh error interrupt.
218
31
23
15
31
23
15
7
7
AT91SAM7SE512/256/32 Preliminary
SDRAMC Interrupt Enable Register
SDRAMC Interrupt Disable Register
30
22
14
30
22
14
SDRAMC_IER
Write-only
6
SDRAMC_IDR
Write-only
6
29
21
13
29
21
13
5
5
28
20
12
28
20
12
4
4
27
19
11
27
19
11
3
3
26
18
10
26
18
10
2
2
25
17
25
17
9
1
9
1
6222B–ATARM–26-Mar-07
RES
RES
24
16
24
16
8
0
8
0

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