AT91SAM7X512-AU Atmel, AT91SAM7X512-AU Datasheet - Page 282

MCU ARM 512K HS FLASH 100-LQFP

AT91SAM7X512-AU

Manufacturer Part Number
AT91SAM7X512-AU
Description
MCU ARM 512K HS FLASH 100-LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91SAM7X512-AU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
CAN, Ethernet, I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
62
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
128 KB
Interface Type
CAN, SPI, SSC, TWI, USART, USB
Maximum Clock Frequency
55 MHz
Number Of Programmable I/os
13
Number Of Timers
3
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, KSK-AT91SAM7X-PL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7X-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
No. Of I/o's
62
Ram Memory Size
128KB
Cpu Speed
55MHz
No. Of Timers
3
No. Of Pwm Channels
4
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7X-EK - KIT EVAL FOR AT91SAM7X256/128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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29.3
29.3.1
29.4
29.4.1
29.4.2
29.4.3
282
Application Block Diagram
Product Dependencies
AT91SAM7X512/256/128 Preliminary
I/O Lines Description
I/O Lines
Power Management
Interrupt
Figure 29-2. Application Block Diagram
Table 29-2.
Both TWD and TWCK are bidirectional lines, connected to a positive supply voltage via a current
source or pull-up resistor (see
high. The output stages of devices connected to the bus must have an open-drain or open-col-
lector to perform the wired-AND function.
TWD and TWCK pins may be multiplexed with PIO lines. To enable the TWI, the programmer
must perform the following steps:
The TWI interface may be clocked through the Power Management Controller (PMC), thus the
programmer must first configure the PMC to enable the TWI clock.
The TWI interface has an interrupt line connected to the Advanced Interrupt Controller (AIC). In
order to handle interrupts, the AIC must be programmed before configuring the TWI.
Pin Name
TWD
TWCK
• Program the PIO controller to:
• Enable the peripheral clock.
Rp: Pull up value as given by the I²C Standard
Host with
Interface
– Dedicate TWD and TWCK as peripheral lines.
– Define TWD and TWCK as open-drain.
TWI
TWD
TWCK
I/O Lines Description
Serial EEPROM
Atmel TWI
Slave 1
Pin Description
Two-wire Serial Data
Two-wire Serial Clock
Figure 29-2 on page
I²C RTC
Slave 2
Controller
I²C LCD
Slave 3
282). When the bus is free, both lines are
I²C Temp.
Slave 4
Sensor
Rp
6120H–ATARM–17-Feb-09
Input/Output
Input/Output
Type
Rp
VDD

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