AT91SAM7X512-AU Atmel, AT91SAM7X512-AU Datasheet - Page 362

• Manufacturer Part Number: AT91SAM7X512-AU
• Description: MCU ARM 512K HS FLASH 100-LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7X512-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: CAN, Ethernet, I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 62
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 128 KB
• Interface Type: CAN, SPI, SSC, TWI, USART, USB
• Maximum Clock Frequency: 55 MHz
• Number Of Programmable I/os: 13
• Number Of Timers: 3
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, KSK-AT91SAM7X-PL, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7X-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• No. Of I/o's: 62
• Ram Memory Size: 128KB
• Cpu Speed: 55MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 4
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7X-EK - KIT EVAL FOR AT91SAM7X256/128
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Table 31-3.
Figure 31-13. Transmit and Receive Frame Format in Edge/Pulse Start Modes
Note:
Figure 31-14. Transmit Frame Format in Continuous Mode
362
Transmitter
SSC_TFMR
SSC_TFMR
SSC_TFMR
SSC_TFMR
SSC_TFMR
SSC_TFMR
SSC_TCMR
SSC_TCMR
1. Example of input on falling edge of TF/RF.
AT91SAM7X512/256/128 Preliminary
Data Frame Registers
(If FSDEN = 0)
(If FSDEN = 1)
Receiver
SSC_RFMR
SSC_RFMR
SSC_RFMR
SSC_RFMR
SSC_RCMR
SSC_RCMR
TF/RF
RD
TD
TD
Start
(1)
From SSC_TSHR
To SSC_RSHR
Sync Data
Sync Data
FSLEN
TD
From DATDEF
STTDLY
Start: 1. TXEMPTY set to 1
Default
Field
DATLEN
DATNB
MSBF
FSLEN
DATDEF
FSDEN
PERIOD
STTDLY
FromDATDEF
2. Write into the SSC_THR
From SSC_THR
Default
Ignored
Start
DATLEN
Data
From SSC_THR
From SSC_THR
To SSC_RHR
Length
Up to 32
Up to 16
Up to 16
0 or 1
Up to 512
Up to 255
DATLEN
Data
Data
Data
PERIOD
From SSC_THR
DATLEN
Data
DATNB
From SSC_THR
From SSC_THR
To SSC_RHR
DATLEN
Data
Data
Data
Comment
Size of word
Number of words transmitted in frame
Most significant bit first
Size of Synchro data register
Data default value ended
Enable send SSC_TSHR
Frame size
Size of transmit start delay
Default
FromDATDEF
Ignored
Default
From DATDEF
Start
Default
Sync Data
Sync Data
6120H–ATARM–17-Feb-09