AT91SAM7X512-AU Atmel, AT91SAM7X512-AU Datasheet - Page 38

• Manufacturer Part Number: AT91SAM7X512-AU
• Description: MCU ARM 512K HS FLASH 100-LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7X512-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: CAN, Ethernet, I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 62
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 128 KB
• Interface Type: CAN, SPI, SSC, TWI, USART, USB
• Maximum Clock Frequency: 55 MHz
• Number Of Programmable I/os: 13
• Number Of Timers: 3
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, KSK-AT91SAM7X-PL, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7X-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• No. Of I/o's: 62
• Ram Memory Size: 128KB
• Cpu Speed: 55MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 4
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7X-EK - KIT EVAL FOR AT91SAM7X256/128
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

10.14 CAN Controller
10.15 Analog-to-Digital Converter
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AT91SAM7X512/256/128 Preliminary
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• Suspend/resume logic
• 8-channel ADC
• 10-bit 384 K samples/sec. Successive Approximation Register ADC
• ±2 LSB Integral Non Linearity, ±1 LSB Differential Non Linearity
• Integrated 8-to-1 multiplexer, offering eight independent 3.3V analog inputs
• External voltage reference for better accuracy on low voltage inputs
• Individual enable and disable of each channel
• Multiple trigger sources
• Sleep Mode and conversion sequencer
• Four of eight analog inputs shared with digital signals
Fully compliant with CAN 2.0A and 2.0B
Bit rates up to 1Mbit/s
Eight object oriented mailboxes each with the following properties:
– CAN Specification 2.0 Part A or 2.0 Part B Programmable for each Message
– Object configurable to receive (with overwrite or not) or transmit
– Local tag and mask filters up to 29-bit identifier/channel
– 32-bit access to data registers for each mailbox data object
– Uses a 16-bit time stamp on receive and transmit message
– Hardware concatenation of ID unmasked bitfields to speedup family ID processing
– 16-bit internal timer for time stamping and network synchronization
– Programmable reception buffer length up to 8 mailbox objects
– Priority management between transmission mailboxes
– Autobaud and listening mode
– Low power mode and programmable wake-up on bus activity or by the application
– Data, remote, error and overload frame handling
– Hardware or software trigger
– External trigger pin
– Timer Counter 0 to 2 outputs TIOA0 to TIOA2 trigger
– Automatic wakeup on trigger and back to sleep mode after conversions of all
enabled channels
6120H–ATARM–17-Feb-09