LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 260
LPC2468FET208,551
Manufacturer Part Number
LPC2468FET208,551
Description
IC ARM7 MCU FLASH 512K 208TFBGA
Manufacturer
NXP Semiconductors
Series
LPC2400r
Specifications of LPC2468FET208,551
Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
208-TFBGA
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
160
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2S/ISP/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
6
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
Development Tools By Supplier
OM10100
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
208TFBGA
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4262
935283234551
LPC2468FET208-S
935283234551
LPC2468FET208-S
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UM10237_4
User manual
addresses of a packet are calculated once for all the fragments belonging to the same
packet and then stored in every StatusHashCRC word of the statuses associated with the
corresponding fragments. If the reception reports an error, any remaining data in the
receive frame is discarded and the LastFrag bit will be set in the receive status field, so
the error flags in all but the last fragment of a frame will always be 0.
The status of the last received frame can also be inspected by reading the RSV register.
The register does not report statuses on a fragment basis and does not store information
of previously received frames. RSV is provided primarily for debug purposes, because the
communication between driver software and the Ethernet block takes place through the
frame descriptors.
Reception error handling
When an error occurs during the receive process, the Rx DMA manager will report the
error via the receive StatusInfo written in the Status array and the IntStatus interrupt status
register.
The receive process can generate several types of errors: AlignmentError, RangeError,
LengthError, SymbolError, CRCError, Overrun, and NoDescriptor. All have corresponding
bits in the receive StatusInfo. In addition to the separate bits in the StatusInfo,
AlignmentError, RangeError, LengthError, SymbolError, and CRCError are ORed together
into the Error bit of the StatusInfo. Errors are also propagated to the IntStatus register; the
RxError bit in the IntStatus register is set if there is an AlignmentError, RangeError,
LengthError, SymbolError, CRCError, or NoDescriptor error; nonfatal overrun errors are
reported in the RxError bit of the IntStatus register; fatal Overrun errors are report in the
RxOverrun bit of the IntStatus register. On fatal overrun errors, the Rx datapath needs to
be soft reset by setting the RxReset bit in the Command register.
Overrun errors can have three causes:
The first overrun situation will result in an incomplete frame with a NoDescriptor status
and the RxError bit in IntStatus set. Software should discard the partially received frame.
In the second overrun situation the frame data will be corrupt which results in the Overrun
status bit being set in the Status word while the IntError interrupt bit is set. In the third case
receive errors cannot be reported in the receiver Status arrays which corrupts the
hardware state; the errors will still be reported in the IntStatus register’s Overrun bit. The
RxReset bit in the Command register should be used to soft reset the hardware.
Device drivers should catch the above receive errors and take action.
Receive triggers interrupts
•
•
•
In the case of a multi-fragment reception, the next descriptor may be missing. In this
case the NoDescriptor field is set in the status word of the previous descriptor and the
RxError in the IntStatus register is set. This error is nonfatal.
The data flow on the receiver data interface stalls, corrupting the packet. In this case
the overrun bit in the status word is set and the RxError bit in the IntStatus register is
set. This error is nonfatal.
The flow of reception statuses stalls and a new status has to be written while a
previous status still waits to be transferred across the memory interface. This error will
corrupt the hardware state and requires the hardware to be soft reset. The error is
detected and sets the Overrun bit in the IntStatus register.
Rev. 04 — 26 August 2009
Chapter 11: LPC24XX Ethernet
UM10237
© NXP B.V. 2009. All rights reserved.
260 of 792
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