LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 789

• Manufacturer Part Number: LPC2468FET208,551
• Description: IC ARM7 MCU FLASH 512K 208TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2468FET208,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 208-TFBGA
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2S/ISP/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 6
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
• Development Tools By Supplier: OM10100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Package: 208TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4262; 935283234551; LPC2468FET208-S

NXP Semiconductors
Chapter 26: LPC24XX Real-Time Clock (RTC) and battery RAM
1
2
3
4
5
6
6.1
6.2
6.2.1
6.2.2
6.2.3
6.2.4
6.2.5
6.2.6
6.3
6.3.1
Chapter 27: LPC24XX WatchDog Timer (WDT)
1
2
3
4
4.1
4.2
Chapter 28: LPC24XX Analog-to Digital Converter (ADC)
1
2
3
4
5
5.1
5.2
Chapter 29: LPC24XX Digital-to Analog Converter (DAC)
1
2
3
Chapter 30: LPC24XX Flash memory programming firmware
1
UM10237_4
User manual
Basic configuration . . . . . . . . . . . . . . . . . . . . 647
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 647
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 647
Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . 648
Pin description . . . . . . . . . . . . . . . . . . . . . . . . 648
Register description . . . . . . . . . . . . . . . . . . . 649
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 662
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . 662
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 662
Register description . . . . . . . . . . . . . . . . . . . 663
Basic configuration . . . . . . . . . . . . . . . . . . . . 667
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 667
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 667
Pin description . . . . . . . . . . . . . . . . . . . . . . . . 667
Register description . . . . . . . . . . . . . . . . . . . 668
Basic configuration . . . . . . . . . . . . . . . . . . . . 674
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 674
Pin description . . . . . . . . . . . . . . . . . . . . . . . . 674
How to read this chapter . . . . . . . . . . . . . . . . 676
RTC interrupts . . . . . . . . . . . . . . . . . . . . . . . 650
Miscellaneous register group . . . . . . . . . . . . 650
Interrupt Location Register (ILR -
0xE002 4000) . . . . . . . . . . . . . . . . . . . . . . . . 650
Clock Tick Counter Register (CTCR -
0xE002 4004) . . . . . . . . . . . . . . . . . . . . . . . . 651
Clock Control Register (CCR - 0xE002 4008) 651
Counter Increment Interrupt Register (CIIR -
0xE002 400C). . . . . . . . . . . . . . . . . . . . . . . . 651
Counter Increment Select Mask Register (CISS -
0xE002 4040) . . . . . . . . . . . . . . . . . . . . . . . . 652
Alarm Mask Register (AMR - 0xE002 4010). 653
Consolidated time registers . . . . . . . . . . . . . 653
Consolidated Time Register 0 (CTIME0 -
0xE002 4014) . . . . . . . . . . . . . . . . . . . . . . . . 653
Watchdog Mode Register (WDMOD -
0xE000 0000) . . . . . . . . . . . . . . . . . . . . . . . . 663
Watchdog Timer Constant Register (WDTC -
0xE000 0004) . . . . . . . . . . . . . . . . . . . . . . . . 664
A/D Control Register (AD0CR -
0xE003 4000) . . . . . . . . . . . . . . . . . . . . . . . . 669
A/D Global Data Register (AD0GDR -
0xE003 4004) . . . . . . . . . . . . . . . . . . . . . . . . 670
Rev. 04 — 26 August 2009
6.3.2
6.3.3
6.4
6.4.1
6.5
6.6
6.7
6.7.1
6.7.2
6.7.3
6.7.4
6.7.5
7
8
9
4.3
4.4
4.5
5
5.3
5.4
5.5
6
6.1
6.2
6.3
4
5
2
Chapter 36: LPC24XX Supplementary information
RTC usage notes. . . . . . . . . . . . . . . . . . . . . . 659
Battery RAM. . . . . . . . . . . . . . . . . . . . . . . . . . 660
RTC external 32 kHz oscillator component
selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 660
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . 666
Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 673
Register description (DACR - 0xE006 C000) 674
Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 675
Flash boot loader . . . . . . . . . . . . . . . . . . . . . 676
Consolidated Time Register 1 (CTIME1 -
0xE002 4018). . . . . . . . . . . . . . . . . . . . . . . . 654
Consolidated Time Register 2 (CTIME2 -
0xE002 401C) . . . . . . . . . . . . . . . . . . . . . . . 654
Time Counter Group . . . . . . . . . . . . . . . . . . 654
Leap year calculation . . . . . . . . . . . . . . . . . . 655
Alarm register group . . . . . . . . . . . . . . . . . . 655
Alarm output. . . . . . . . . . . . . . . . . . . . . . . . . 656
RTC clock generation . . . . . . . . . . . . . . . . . 656
Reference Clock Divider (Prescaler) . . . . . . 656
Prescaler Integer Register (PREINT -
0xE002 4080). . . . . . . . . . . . . . . . . . . . . . . . 657
Prescaler Fraction Register (PREFRAC -
0xE002 4084). . . . . . . . . . . . . . . . . . . . . . . . 657
Example of Prescaler Usage . . . . . . . . . . . . 657
Prescaler operation . . . . . . . . . . . . . . . . . . . 658
Watchdog Feed Register (WDFEED -
0xE000 0008). . . . . . . . . . . . . . . . . . . . . . . . 664
Watchdog Timer Value Register (WDTV -
0xE000 000C) . . . . . . . . . . . . . . . . . . . . . . . 665
Watchdog Timer Clock Source Selection Register
(WDCLKSEL - 0xE000 0010) . . . . . . . . . . . 665
A/D Status Register (AD0STAT -
0xE003 4030). . . . . . . . . . . . . . . . . . . . . . . . 671
A/D Interrupt Enable Register (AD0INTEN -
0xE003 400C) . . . . . . . . . . . . . . . . . . . . . . . 672
A/D Data Registers (AD0DR0 to AD0DR7 -
0xE003 4010 to 0xE003 402C) . . . . . . . . . . 672
Hardware-triggered conversion . . . . . . . . . . 673
Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . 673
Accuracy vs. digital receiver . . . . . . . . . . . . 673
UM10237
© NXP B.V. 2009. All rights reserved.
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