LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 619

• Manufacturer Part Number: LPC2468FET208,551
• Description: IC ARM7 MCU FLASH 512K 208TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2468FET208,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 208-TFBGA
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2S/ISP/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 6
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
• Development Tools By Supplier: OM10100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Package: 208TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4262; 935283234551; LPC2468FET208-S

NXP Semiconductors
UM10237_4
User manual
Table 542. Conditions for FIFO level comparison
System signaling occurs when a level detection is true and enabled.
Table 543. DMA and interrupt request generation
Table 544. Status feedback in the I2SSTATE register
Level Comparison
dmareq_tx_1
dmareq_rx_1
dmareq_tx_2
dmareq_rx_2
irq_tx
irq_rx
System Signaling
irq
dmareq[0]
dmareq[1]
Status Feedback
irq
dmareq1
dmareq2
Rev. 04 — 26 August 2009
Condition
tx_depth_dma1 >= tx_level
rx_depth_dma1 <= rx_level
tx_depth_dma2 >= tx_level
rx_depth_dma2 <= rx_level
tx_depth_irq >= tx_level
rx_depth_irq <= rx_level
Condition
(irq_rx & rx_irq_enable) | (irq_tx & tx_irq_enable
(dmareq_tx_1 & tx_dma1_enable ) | (dmareq_rx_1 &
rx_dma1_enable )
( dmareq_tx_2 & tx_dma2_enable ) | (dmareq_rx_2 &
rx_dma2_enable )
Status
irq_rx | irq_tx
(dmareq_tx_1 | dmareq_rx_1)
(dmareq_rx_2 | dmareq_tx_2)
Chapter 23: LPC24XX I
UM10237
© NXP B.V. 2009. All rights reserved.
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S interface
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