LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 35
![IC ARM7 MCU FLASH 512K 208TFBGA](/photos/12/32/123248/mfg_lpc24xx_sml.jpg)
LPC2468FET208,551
Manufacturer Part Number
LPC2468FET208,551
Description
IC ARM7 MCU FLASH 512K 208TFBGA
Manufacturer
NXP Semiconductors
Series
LPC2400r
Specifications of LPC2468FET208,551
Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
208-TFBGA
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
160
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2S/ISP/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
6
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
Development Tools By Supplier
OM10100
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
208TFBGA
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4262
935283234551
LPC2468FET208-S
935283234551
LPC2468FET208-S
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC2468FET208,551
Manufacturer:
NXP
Quantity:
6 174
Company:
Part Number:
LPC2468FET208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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NXP Semiconductors
UM10237_4
User manual
Table 30.
[1]
Bit
0
2:1
3
7:4
10:8
11
14:12 EP1
15
18:16 EP2
19
22:20 EP3
23
26:24 EP4
27
30:28 EP5
31
Allowed values for nnn are: 101 (highest priority), 100, 011, 010, 001 (lowest priority).
Symbol
scheduler
break_burst
quantum_type
quantum_size
default_master
-
-
-
-
-
-
AHB Arbiter Configuration register 1 (AHBCFG1 - address 0xE01F C188) bit
description
Rev. 04 — 26 August 2009
Value Description
0
1
00
01
10
11
0
1
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
nnn
-
nnn
-
nnn
-
nnn
-
nnn
--
nnn
-
[1]
[1]
[1]
[1]
[1]
[1]
Break all defined length bursts (the CPU does not create
Priority scheduling.
Uniform (round-robin) scheduling.
defined bursts).
Break all defined length bursts greater than four-beat.
Break all defined length bursts greater than eight-beat.
Never break defined length bursts.
A quantum is an AHB clock.
A quantum is an AHB bus cycle.
Controls the type of arbitration and the number of quanta
before re-arbiration occurs.
Preemptive, re-arbitrate after 1 AHB quantum.
Preemptive, re-arbitrate after 2 AHB quanta.
Preemptive, re-arbitrate after 4 AHB quanta.
Preemptive, re-arbitrate after 8 AHB quanta.
Preemptive, re-arbitrate after 16 AHB quanta.
Preemptive, re-arbitrate after 32 AHB quanta.
Preemptive, re-arbitrate after 64 AHB quanta.
Preemptive, re-arbitrate after 128 AHB quanta.
Preemptive, re-arbitrate after 256 AHB quanta.
Preemptive, re-arbitrate after 512 AHB quanta.
Preemptive, re-arbitrate after 1024 AHB quanta.
Preemptive, re-arbitrate after 2048 AHB quanta.
Preemptive, re-arbitrate after 4096 AHB quanta.
Preemptive, re-arbitrate after 8192 AHB quanta.
Preemptive, re-arbitrate after 16384 AHB quanta.
Non- preemptive, infinite AHB quanta.
Master 1 (CPU) is the default master.
Reserved.
External priority for master 1 (CPU).
Reserved.
External priority for master 2 (GPDMA).
Reserved.
External priority for master 3 (AHB1).
Reserved.
External priority for master 4 (USB).
Reserved.
External priority for master 5 (LCD).
Reserved.
Chapter 3: LPC24XX System control
UM10237
© NXP B.V. 2009. All rights reserved.
35 of 792
Reset
value
1
10
0100
001
-
-
-
-
-
-
0
000
000
000
000
000
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