S9S08SG8E2MTJ Freescale Semiconductor, S9S08SG8E2MTJ Datasheet - Page 223

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S9S08SG8E2MTJ

Manufacturer Part Number
S9S08SG8E2MTJ
Description
MCU 2K FLASH 20-TSSOP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of S9S08SG8E2MTJ

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-TSSOP
Processor Series
S08SG
Core
HCS08
Data Bus Width
8 bit
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08SG32, DEMO9S08SG32AUTO, DEMO9S08SG8, DEMO9S08SG8AUTO
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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0
15.1.3
As shown in
prescale bits (SPPR2:SPPR1:SPPR0) choose a prescale divisor of 1, 2, 3, 4, 5, 6, 7, or 8. The three rate
select bits (SPR2:SPR1:SPR0) divide the output of the prescaler stage by 2, 4, 8, 16, 32, 64, 128, or 256
to get the internal SPI master mode bit-rate clock.
Freescale Semiconductor
BUS RATE
CLOCK
SPI SYSTEM
ENABLE
LSBFE
MSTR
SPE
SPI Baud Rate Generation
CLOCK GENERATOR
Figure
SPIBR
MASTER/SLAVE
MODE SELECT
15-4, the clock source for the SPI baud rate generator is the bus clock. The three
SHIFT
OUT
SHIFT
DIRECTION
Tx BUFFER (WRITE SPID)
Rx BUFFER (READ SPID)
MODE FAULT
DETECTION
SPI SHIFT REGISTER
CLOCK
CLOCK
LOGIC
Figure 15-3. SPI Module Block Diagram
SHIFT
MC9S08SG8 MCU Series Data Sheet, Rev. 6
MODF
Rx BUFFER
SPRF
FULL
Tx BUFFER
EMPTY
SHIFT
SPTEF
SPTIE
SPIE
IN
MASTER CLOCK
SLAVE CLOCK
BIDIROE
MODFEN
SPC0
SSOE
Chapter 15 Serial Peripheral Interface (S08SPIV3)
PIN CONTROL
M
S
M
S
M
S
MASTER/
SLAVE
SPI
INTERRUPT
REQUEST
MOSI
(MOMI)
MISO
(SISO)
SPSCK
SS
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