S9S08SG8E2MTJ Freescale Semiconductor, S9S08SG8E2MTJ Datasheet - Page 83

no-image

S9S08SG8E2MTJ

Manufacturer Part Number
S9S08SG8E2MTJ
Description
MCU 2K FLASH 20-TSSOP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of S9S08SG8E2MTJ

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-TSSOP
Processor Series
S08SG
Core
HCS08
Data Bus Width
8 bit
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08SG32, DEMO9S08SG32AUTO, DEMO9S08SG8, DEMO9S08SG8AUTO
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S9S08SG8E2MTJ
Manufacturer:
FREESCALE
Quantity:
20 000
Part Number:
S9S08SG8E2MTJR
Manufacturer:
MICROCHIP
Quantity:
31 000
Part Number:
S9S08SG8E2MTJR
Manufacturer:
FREESCALE
Quantity:
20 000
Part Number:
S9S08SG8E2MTJR
0
6.6.2.3
6.6.2.4
Freescale Semiconductor
PTBPE[7:0]
PTBSE[7:0]
Reset:
Reset:
Field
Field
7:0
7:0
W
W
R
R
PTBPE7
PTBSE7
Internal Pull Enable for Port B Bits — Each of these control bits determines if the internal pull-up or pull-down
device is enabled for the associated PTB pin. For port B pins that are configured as outputs, these bits have no
effect and the internal pull devices are disabled.
0 Internal pull-up/pull-down device disabled for port B bit n.
1 Internal pull-up/pull-down device enabled for port B bit n.
Output Slew Rate Enable for Port B Bits — Each of these control bits determines if the output slew rate control
is enabled for the associated PTB pin. For port B pins that are configured as inputs, these bits have no effect.
0 Output slew rate control disabled for port B bit n.
1 Output slew rate control enabled for port B bit n.
Port B Pull Enable Register (PTBPE)
0
Port B Slew Rate Enable Register (PTBSE)
0
7
7
PTBPE6
PTBSE6
Figure 6-13. Internal Pull Enable for Port B Register (PTBPE)
Figure 6-14. Slew Rate Enable for Port B Register (PTBSE)
0
0
6
6
Table 6-12. PTBPE Register Field Descriptions
Table 6-13. PTBSE Register Field Descriptions
MC9S08SG8 MCU Series Data Sheet, Rev. 6
PTBPE5
PTBSE5
0
0
5
5
PTBPE4
PTBSE4
0
0
4
4
Description
Description
PTBPE3
PTBSE3
3
0
3
0
PTBPE2
PTBSE2
Chapter 6 Parallel Input/Output Control
0
0
2
2
PTBPE1
PTBSE1
0
0
1
1
PTBPE0
PTBSE0
0
0
0
0
82

Related parts for S9S08SG8E2MTJ