S9S08SG8E2MTJ Freescale Semiconductor, S9S08SG8E2MTJ Datasheet - Page 305

• Manufacturer Part Number: S9S08SG8E2MTJ
• Description: MCU 2K FLASH 20-TSSOP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of S9S08SG8E2MTJ

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-TSSOP
• Processor Series: S08SG
• Core: HCS08
• Data Bus Width: 8 bit
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08SG32, DEMO9S08SG32AUTO, DEMO9S08SG8, DEMO9S08SG8AUTO
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

A.12 AC Characteristics
This section describes ac timing characteristics for each peripheral system.
A.12.1
Freescale Semiconductor
1
2
3
4
Typical values are based on characterization data at V
This is the shortest pulse that is guaranteed to be recognized as a reset pin request. Shorter pulses are not guaranteed to
override reset requests from internal sources.
When any reset is initiated, internal circuitry drives the reset pin low for about 66 cycles of t
frequency changes to the untrimmed DCO frequency (f
to 0, and there is an extra divide-by-two because BDIV is reset to 0:1. After other resets trim stays at the pre-reset value.
Timing is shown with respect to 20% V
Nu
m
1
2
3
4
8
9
D
D
D
D
D
C
C
Control Timing
Bus frequency (t
Internal low power oscillator period
External reset pulse width
Reset low drive
Pin interrupt pulse width
Port rise and fall time —
Low output drive (PTxDS = 0) (load = 50 pF)
Port rise and fall time —
High output drive (PTxDS = 1) (load = 50 pF)
Asynchronous path
Synchronous path
Slew rate control disabled (PTxSE = 0)
Slew rate control enabled (PTxSE = 1)
Slew rate control enabled (PTxSE = 1)
Slew rate control disabled (PTxSE = 0)
RESET PIN
3
cyc
= 1/f
5
2
Rating
Bus
MC9S08SG8 MCU Series Data Sheet, Rev. 6
DD
2
)
and 80% V
Table A-13. Control Timing
Figure A-10. Reset Timing
DD
DD
reset
levels. Temperature range –40°C to 125°C.
4
= 5.0V, 25°C unless otherwise stated.
6
= (f
dco_ut
t
extrst
)/4) because TRIM is reset to 0x80 and FTRIM is reset
t
t
t
Symbol
ILIH,
Rise
Rise
t
t
t
rstdrv
f
extrst
LPO
Bus
, t
, t
t
IHIL
Fall
Fall
1.5 x t
66 x t
800
100
100
Min
dc
—
—
—
—
cyc
Appendix A Electrical Characteristics
cyc
cyc
. After POR reset the bus clock
Typ
40
75
11
35
—
—
1
1500
Max
20
—
—
—
—
—
—
—
MHz
Unit
μs
ns
ns
ns
ns
ns
305