MC9S08AC60CFDE Freescale Semiconductor, MC9S08AC60CFDE Datasheet - Page 132

IC MCU 8BIT 60K FLASH 48-QFN

MC9S08AC60CFDE

Manufacturer Part Number
MC9S08AC60CFDE
Description
IC MCU 8BIT 60K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08AC60CFDE

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
38
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN
Processor Series
S08AC
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08AC60E, DEMOACEX, DEMOACKIT, DCF51AC256, DC9S08AC128, DC9S08AC16, DC9S08AC60, DEMO51AC256KIT
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Controller Family/series
HCS08
No. Of I/o's
38
Ram Memory Size
2KB
Cpu Speed
40MHz
No. Of Timers
3
Rohs Compliant
Yes
Height
1 mm
Length
7 mm
Supply Voltage (max)
5.5 V, 5.5 V
Supply Voltage (min)
2.7 V, 2.7 V
Width
7 mm
For Use With
DEMO9S08AC60E - BOARD DEMO FOR MC9S08A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Chapter 8 Cyclic Redundancy Check (S08CRCV1)
8.4.1
The CRC polynomial 0x1021 (x
proposed by the ITU-T (formerly CCITT) committee.
Although the ITU-T recommendations are very clear about the polynomial to be used, 0x1021, they accept
variations in the way the polynomial is implemented:
Moreover, it is common to find circuits in literature slightly different from the one suggested by the
recommendations above, but also known as CRC-CCITT circuits (many variations require the message to
be augmented with zeros).
The circuit implemented in the CRC module is exactly the one suggested by the ITU-T V.41
recommendation, with an added flexibility of a programmable SEED. As in ITU-T V.41, no augmentation
is needed and the CRC result is not negated.
reference. Notice that these are ASCII string messages. For example, message “123456789” is encoded
with bytes 0x31 to 0x39 (see ASCII table).
132
ITU-T V.41 implements the same circuit shown in
0x0000.
ITU-T T.30 and ITU-T X.25 implement the same circuit shown in
the final CRC result to be negated (one-complement operation). Also, they recommend a SEED =
0xFFFF.
ITU-T (CCITT) Recommendations and Expected CRC Results
1
A string of 256 upper case “A”
characters with no line breaks
A string of 256 upper case “A”
characters with no line breaks
A string of 256 upper case “A”
characters with no line breaks
One common variation of CRC-CCITT require the message to be
augmented with zeros and a SEED=0xFFFF. The CRC module will
give the same results of this alternative implementation when
SEED=0x1D0F and no message augmentation.
ASCII String Message
16
“123456789”
“123456789”
“123456789”
+ x
MC9S08AC60 Series Data Sheet, Rev. 2
Table 8-4. Expected CRC results
“A”
“A”
“A”
12
+ x
5
Table 8-4
+ 1) is popularly known as CRC-CCITT since it was initially
(initial CRC value)
shows some expected results that can be used as a
0x1d0f
0x1d0f
0x1d0f
0x0000
0x0000
0x0000
Figure
SEED
0xffff
0xffff
0xffff
1
1
1
8-2, but it recommends a SEED =
CRC result
0x58e5
0xb915
0x9479
0x31c3
0x29b1
0xe5cc
0xabe3
0xea0b
0xe938
Figure
8-2, but they recommend
Freescale Semiconductor

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