MC9S08AC60CFDE Freescale Semiconductor, MC9S08AC60CFDE Datasheet - Page 79
![IC MCU 8BIT 60K FLASH 48-QFN](/photos/12/34/123442/mc9s08ac60cfde_sml.jpg)
MC9S08AC60CFDE
Manufacturer Part Number
MC9S08AC60CFDE
Description
IC MCU 8BIT 60K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.MC9S08AC60CFJE.pdf
(348 pages)
Specifications of MC9S08AC60CFDE
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
38
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN
Processor Series
S08AC
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08AC60E, DEMOACEX, DEMOACKIT, DCF51AC256, DC9S08AC128, DC9S08AC16, DC9S08AC60, DEMO51AC256KIT
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Controller Family/series
HCS08
No. Of I/o's
38
Ram Memory Size
2KB
Cpu Speed
40MHz
No. Of Timers
3
Rohs Compliant
Yes
Height
1 mm
Length
7 mm
Supply Voltage (max)
5.5 V, 5.5 V
Supply Voltage (min)
2.7 V, 2.7 V
Width
7 mm
For Use With
DEMO9S08AC60E - BOARD DEMO FOR MC9S08A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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1
2
5.9.8
Freescale Semiconductor
Bit 1 is a reserved bit that must always be written to 0.
This bit can be written only one time after reset. Additional writes are ignored.
LVDACK
Reset
LVDRE
LVDSE
LVDIE
BGBE
LVDE
Field
LVDF
7
6
5
4
3
2
0
W
R
System Power Management Status and Control 1 Register (SPMSC1)
LVDF
Figure 5-10. System Power Management Status and Control 1 Register (SPMSC1)
Low-Voltage Detect Flag — Provided LVDE = 1, this read-only status bit indicates a low-voltage detect event.
Low-Voltage Detect Acknowledge — This write-only bit is used to acknowledge low voltage detection errors
(write 1 to clear LVDF). Reads always return 0.
Low-Voltage Detect Interrupt Enable — This read/write bit enables hardware interrupt requests for LVDF.
0 Hardware interrupt disabled (use polling).
1 Request a hardware interrupt when LVDF = 1.
Low-Voltage Detect Reset Enable — This read/write bit enables LVDF events to generate a hardware reset
(provided LVDE = 1).
0 LVDF does not generate hardware resets.
1 Force an MCU reset when LVDF = 1.
Low-Voltage Detect Stop Enable — Provided LVDE = 1, this read/write bit determines whether the low-voltage
detect function operates when the MCU is in stop mode.
0 Low-voltage detect disabled during stop mode.
1 Low-voltage detect enabled during stop mode.
Low-Voltage Detect Enable — This read/write bit enables low-voltage detect logic and qualifies the operation
of other bits in this register.
0 LVD logic disabled.
1 LVD logic enabled.
Bandgap Buffer Enable — The BGBE bit is used to enable an internal buffer for the bandgap voltage reference
for use by the ADC module on one of its internal channels.
0 Bandgap buffer disabled.
1 Bandgap buffer enabled.
0
7
= Unimplemented or Reserved
LVDACK
0
0
6
Table 5-12. SPMSC1 Register Field Descriptions
MC9S08AC60 Series Data Sheet, Rev. 2
LVDIE
0
5
LVDRE
1
4
(2)
Description
LVDSE
Chapter 5 Resets, Interrupts, and System Configuration
3
1
(2)
LVDE
1
2
(2)
1
0
1
BGBE
0
0
79
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