MC9S08AC60CFDE Freescale Semiconductor, MC9S08AC60CFDE Datasheet - Page 39

IC MCU 8BIT 60K FLASH 48-QFN

MC9S08AC60CFDE

Manufacturer Part Number
MC9S08AC60CFDE
Description
IC MCU 8BIT 60K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08AC60CFDE

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
38
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN
Processor Series
S08AC
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08AC60E, DEMOACEX, DEMOACKIT, DCF51AC256, DC9S08AC128, DC9S08AC16, DC9S08AC60, DEMO51AC256KIT
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Controller Family/series
HCS08
No. Of I/o's
38
Ram Memory Size
2KB
Cpu Speed
40MHz
No. Of Timers
3
Rohs Compliant
Yes
Height
1 mm
Length
7 mm
Supply Voltage (max)
5.5 V, 5.5 V
Supply Voltage (min)
2.7 V, 2.7 V
Width
7 mm
For Use With
DEMO9S08AC60E - BOARD DEMO FOR MC9S08A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
commands are available.
background debug mode is enabled.
3.6.4
The LVD system is capable of generating either an interrupt or a reset when the supply voltage drops below
the LVD voltage. If the LVD is enabled in stop by setting the LVDE and the LVDSE bits, then the voltage
regulator remains active during stop mode. If the user attempts to enter stop2 with the LVD enabled for
stop, the MCU will instead enter stop3.
LVD is enabled.
3.6.5
When the MCU enters any stop mode, system clocks to the internal peripheral modules are stopped. Even
in the exception case (ENBDM = 1), where clocks to the background debug logic continue to operate,
clocks to the peripheral systems are halted to reduce power consumption. Refer to
Mode,” and
Freescale Semiconductor
Mode
Stop3
Mode
Stop3
LVD Enabled in Stop Mode
On-Chip Peripheral Modules in Stop Modes
Section 3.6.2, “Stop3
PPDC
PPDC
x
x
CPU
RAM
FLASH
Parallel Port Registers
ADC
ICG
IIC
RTI
CPU, Digital
Peripherals,
CPU, Digital
Peripherals,
Standby
Standby
FLASH
FLASH
Table 3-2
Peripheral
Table 3-2. BDM Enabled Stop Mode Behavior
Table 3-3. LVD Enabled Stop Mode Behavior
Mode,” for specific information on system behavior in stop modes.
MC9S08AC60 Series Data Sheet, Rev. 2
summarizes the behavior of the MCU in stop when entry into the
Standby
Standby
RAM
RAM
Table 3-4. Stop Mode Behavior
Table 3-3
Active
ICG
ICG
Off
summarizes the behavior of the MCU in stop when the
Optionally on
Standby
Optionally on
Optionally on
Stop2
Off
Off
Off
Off
Off
Off
ADC
ADC
3
Mode
Regulator
Regulator
Active
Active
Optionally On
Optionally On
Optionally on
Standby
Standby
Standby
Standby
Standby
Stop3
I/O Pins
I/O Pins
States
States
held
held
Chapter 3 Modes of Operation
Section 3.6.1, “Stop2
3
1
2
Optionally on
Optionally on
RTI
RTI
39

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