MC9S08AC60CFDE Freescale Semiconductor, MC9S08AC60CFDE Datasheet - Page 150

IC MCU 8BIT 60K FLASH 48-QFN

MC9S08AC60CFDE

Manufacturer Part Number
MC9S08AC60CFDE
Description
IC MCU 8BIT 60K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08AC60CFDE

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
38
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN
Processor Series
S08AC
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08AC60E, DEMOACEX, DEMOACKIT, DCF51AC256, DC9S08AC128, DC9S08AC16, DC9S08AC60, DEMO51AC256KIT
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Controller Family/series
HCS08
No. Of I/o's
38
Ram Memory Size
2KB
Cpu Speed
40MHz
No. Of Timers
3
Rohs Compliant
Yes
Height
1 mm
Length
7 mm
Supply Voltage (max)
5.5 V, 5.5 V
Supply Voltage (min)
2.7 V, 2.7 V
Width
7 mm
For Use With
DEMO9S08AC60E - BOARD DEMO FOR MC9S08A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Chapter 9 Analog-to-Digital Converter (S08ADC10V1)
are too fast, then the clock must be divided to the appropriate frequency. This divider is specified by the
ADIV bits and can be divide-by 1, 2, 4, or 8.
9.5.2
The pin control registers (APCTL2, and APCTL1) are used to disable the I/O port control of the pins used
as analog inputs.When a pin control register bit is set, the following conditions are forced for the associated
MCU pin:
9.5.3
The ADC module has a selectable asynchronous hardware conversion trigger, ADHWT, that is enabled
when the ADTRG bit is set. This source is not available on all MCUs. Consult the module introduction for
information on the ADHWT source specific to this MCU.
When ADHWT source is available and hardware trigger is enabled (ADTRG=1), a conversion is initiated
on the rising edge of ADHWT. If a conversion is in progress when a rising edge occurs, the rising edge is
ignored. In continuous convert configuration, only the initial rising edge to launch continuous conversions
is observed. The hardware trigger function operates in conjunction with any of the conversion modes and
configurations.
9.5.4
Conversions can be performed in either 10-bit mode or 8-bit mode as determined by the MODE bits.
Conversions can be initiated by either a software or hardware trigger. In addition, the ADC module can be
configured for low power operation, long sample time, continuous conversion, and automatic compare of
the conversion result to a software determined compare value.
9.5.4.1
A conversion is initiated:
If continuous conversions are enabled a new conversion is automatically initiated after the completion of
the current conversion. In software triggered operation, continuous conversions begin after ADCSC1 is
written and continue until aborted. In hardware triggered operation, continuous conversions begin after a
hardware trigger event and continue until aborted.
150
The output buffer is forced to its high impedance state.
The input buffer is disabled. A read of the I/O port returns a zero for any pin with its input buffer
disabled.
The pullup is disabled.
Following a write to ADCSC1 (with ADCH bits not all 1s) if software triggered operation is
selected.
Following a hardware trigger (ADHWT) event if hardware triggered operation is selected.
Following the transfer of the result to the data registers when continuous conversion is enabled.
Input Select and Pin Control
Hardware Trigger
Conversion Control
Initiating Conversions
MC9S08AC60 Series Data Sheet, Rev. 2
Freescale Semiconductor

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