MC9S08AC60CFDE Freescale Semiconductor, MC9S08AC60CFDE Datasheet - Page 17

• Manufacturer Part Number: MC9S08AC60CFDE
• Description: IC MCU 8BIT 60K FLASH 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08AC60CFDE

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 38
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN
• Processor Series: S08AC
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C/SCI/SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 56
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08AC60E, DEMOACEX, DEMOACKIT, DCF51AC256, DC9S08AC128, DC9S08AC16, DC9S08AC60, DEMO51AC256KIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Controller Family/series: HCS08
• No. Of I/o's: 38
• Ram Memory Size: 2KB
• Cpu Speed: 40MHz
• No. Of Timers: 3
• Rohs Compliant: Yes
• Height: 1 mm
• Length: 7 mm
• Supply Voltage (max): 5.5 V, 5.5 V
• Supply Voltage (min): 2.7 V, 2.7 V
• Width: 7 mm
• For Use With: DEMO9S08AC60E - BOARD DEMO FOR MC9S08A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Section Number
15.7 Reset Overview .............................................................................................................................275
15.8 Interrupts .......................................................................................................................................275
15.9 The Differences from TPM v2 to TPM v3 ....................................................................................277
16.1 Introduction ...................................................................................................................................281
16.2 Background Debug Controller (BDC) ..........................................................................................282
16.3 On-Chip Debug System (DBG) ....................................................................................................291
16.4 Register Definition ........................................................................................................................295
A.1 Introduction ....................................................................................................................................303
A.2 Parameter Classification.................................................................................................................303
A.3 Absolute Maximum Ratings...........................................................................................................304
A.4 Thermal Characteristics..................................................................................................................305
A.5 ESD Protection and Latch-Up Immunity .......................................................................................306
A.6 DC Characteristics..........................................................................................................................308
A.7 Supply Current Characteristics.......................................................................................................311
A.8 ADC Characteristics.......................................................................................................................314
A.9 Internal Clock Generation Module Characteristics ........................................................................317
Freescale Semiconductor
15.6.1 Counter ............................................................................................................................270
15.6.2 Channel Mode Selection .................................................................................................272
15.7.1 General ............................................................................................................................275
15.7.2 Description of Reset Operation .......................................................................................275
15.8.1 General ............................................................................................................................275
15.8.2 Description of Interrupt Operation ..................................................................................276
16.1.1 Features ...........................................................................................................................282
16.2.1 BKGD Pin Description ...................................................................................................283
16.2.2 Communication Details ..................................................................................................284
16.2.3 BDC Commands .............................................................................................................288
16.2.4 BDC Hardware Breakpoint .............................................................................................290
16.3.1 Comparators A and B ......................................................................................................291
16.3.2 Bus Capture Information and FIFO Operation ...............................................................291
16.3.3 Change-of-Flow Information ..........................................................................................292
16.3.4 Tag vs. Force Breakpoints and Triggers .........................................................................292
16.3.5 Trigger Modes .................................................................................................................293
16.3.6 Hardware Breakpoints ....................................................................................................295
16.4.1 BDC Registers and Control Bits .....................................................................................295
16.4.2 System Background Debug Force Reset Register (SBDFR) ..........................................297
16.4.3 DBG Registers and Control Bits .....................................................................................298
Electrical Characteristics and Timing Specifications
MC9S08AC60 Series Data Sheet, Rev. 2
Development Support
Appendix A
Chapter 16
Title
Page
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