MC908GR4CDWE Freescale Semiconductor, MC908GR4CDWE Datasheet - Page 146

• Manufacturer Part Number: MC908GR4CDWE
• Description: IC MCU 4K FLASH 8MHZ 28-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GR4CDWE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 17
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Controller Family/series: HC08
• No. Of I/o's: 21
• Ram Memory Size: 384Byte
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08GR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8.2 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Input/Output Ports (I/O)
16.2 Port A
Port A is an 4-bit special-function port that shares all four of its pins with the keyboard interrupt (KBI)
module. Port A also has software configurable pullup devices if configured as an input port.
16.2.1 Port A Data Register
The port A data register (PTA) contains a data latch for each of the four port A pins.
PTA3–PTA0 — Port A Data Bits
KBD3–KBD0 — Keyboard Inputs
16.2.2 Data Direction Register A
Data direction register A (DDRA) determines whether each port A pin is an input or an output. Writing a 1
to a DDRA bit enables the output buffer for the corresponding port A pin; a 0 disables the output buffer.
DDRA3–DDRA0 — Data Direction Register A Bits
Figure 16-4
146
These read/write bits are software programmable. Data direction of each port A pin is under the control
of the corresponding bit in data direction register A. Reset has no effect on port A data.
The keyboard interrupt enable bits, KBIE3–KBIE0, in the keyboard interrupt control register (KBICR)
enable the port A pins as external interrupt pins. See
These read/write bits control port A data direction. Reset clears DDRA3–DDRA0, configuring all port
A pins as inputs.
1 = Corresponding port A pin configured as output
0 = Corresponding port A pin configured as input
Alternative Function:
shows the port A I/O logic.
Address:
Avoid glitches on port A pins by writing to the port A data register before
changing data direction register A bits from 0 to 1.
Reset:
Read:
Write:
Address:
Reset:
Read:
Write:
$0004
Bit 7
0
0
$0000
Bit 7
Figure 16-3. Data Direction Register A (DDRA)
0
MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7
= Unimplemented
Figure 16-2. Port A Data Register (PTA)
= Unimplemented
6
0
0
0
6
5
0
0
5
0
NOTE
4
0
0
Unaffected by reset
4
0
Chapter 13 Keyboard Interrupt
DDRA3
3
0
KBD3
PTA3
3
DDRA2
2
0
KBD2
PTA2
2
DDRA1
1
0
KBD1
PTA1
1
Freescale Semiconductor
DDRA0
Bit 0
0
(KBI).
KBD0
PTA0
Bit 0