MC908GR4CDWE Freescale Semiconductor, MC908GR4CDWE Datasheet - Page 83

IC MCU 4K FLASH 8MHZ 28-SOIC

MC908GR4CDWE

Manufacturer Part Number
MC908GR4CDWE
Description
IC MCU 4K FLASH 8MHZ 28-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MC908GR4CDWE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
17
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
HC08
No. Of I/o's
21
Ram Memory Size
384Byte
Cpu Speed
8MHz
No. Of Timers
1
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08GR
Core
HC08
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8.2 MHz
Number Of Programmable I/os
21
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
7.5.3 PLL Multiplier Select Register High
The PLL multiplier select register high (PMSH) contains the programming information for the high byte of
the modulo feedback divider.
MUL11–MUL8 — Multiplier Select Bits
PMSH[7:4] — Unimplemented Bits
7.5.4 PLL Multiplier Select Register Low
The PLL multiplier select register low (PMSL) contains the programming information for the low byte of
the modulo feedback divider.
MUL7–MUL0 — Multiplier Select Bits
Freescale Semiconductor
These read/write bits control the high byte of the modulo feedback divider that selects the VCO
frequency multiplier N. (See
the multiplier select registers configures the modulo feedback divider the same as a value of $0001.
Reset initializes the registers to $0040 for a default multiply value of 64.
These bits have no function and always read as logic 0s.
These read/write bits control the low byte of the modulo feedback divider that selects the VCO
frequency multiplier, N. (See
be written when the PLLON bit in the PCTL is set. A value of $0000 in the multiplier select registers
configures the modulo feedback divider the same as a value of $0001. Reset initializes the register to
$40 for a default multiply value of 64.
Address:
Address:
The multiplier select bits have built-in protection such that they cannot be
written when the PLL is on (PLLON = 1).
The multiplier select bits have built-in protection such that they cannot be
written when the PLL is on (PLLON = 1).
Reset:
Reset:
Read:
Read:
Write:
Write:
Figure 7-6. PLL Multiplier Select Register High (PMSH)
$0038
$0038
Figure 7-7. PLL Multiplier Select Register Low (PMSL)
MUL7
Bit 7
Bit 7
0
0
0
MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7
= Unimplemented
7.3.3 PLL Circuits
7.3.3 PLL Circuits
MUL6
6
0
0
6
1
MUL5
5
0
0
5
0
NOTE
NOTE
and
and
MUL4
4
0
0
4
0
7.3.6 Programming the
7.3.6 Programming the
MUL11
MUL3
3
0
3
0
MUL10
MUL2
2
0
2
0
MUL9
MUL1
PLL.) MUL7–MUL0 cannot
PLL.) A value of $0000 in
1
0
1
0
MUL8
MUL0
Bit 0
Bit 0
0
0
CGMC Registers
83

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