D12312SVTEBL25 Renesas Electronics America, D12312SVTEBL25 Datasheet - Page 7

• Manufacturer Part Number: D12312SVTEBL25
• Description: IC H8S MCU ROMLESS 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12312SVTEBL25

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412312SVTEBL25; HD6412312SVTEBL25

Item
1.1.1 Features
2.2.22 CLRMAC
Operand Format and
Number of States
Required for Execution
2.2.24 DAA
Description
2.2.37
Operand Format and
Number of States
Required for Execution
2.2.42 (1) MULXS (B)
Operand Format and
Number of States
Required for Execution
2.2.42 (2) MULXS (W)
Operand Format and
Number of States
Required for Execution
2.2.43 (1) MULXU (B)
Operand Format and
Number of States
Required for Execution
2.2.43 (2) MULXU (W)
Operand Format and
Number of States
Required for Execution
LDMAC
Main Revisions for This Edition
Page
2
90
94
130
151
152
153
154
Revisions (See Manual for Details)
Note * added
— Maximum clock frequency: 20 MHz *
Note: * The maximum operating frequency and instruction
execution time differ depending on the product.
Further explanation added to note
The number of states may differ depending on the product.
For details, refer to the hardware manual of the product in
question.
Table amended
Further explanation added to note
The number of states may differ depending on the product.
For details, refer to the hardware manual of the product in
question.
Adjustment
C Flag
before
0
1
1
1
Upper 4 Bits
Adjustment
before
A to F
0 to 2
0 to 2
0 to 3
Adjustment
H Flag
before
Rev. 4.00 Feb 24, 2006 page v of xiv
1
0
0
1
Lower 4 Bits
Adjustment
before
A to F
0 to 3
0 to 9
0 to 3
(Hexadecimal)
Added
Value
66
60
66
66
Adjustment
C Flag
after
1
1
1
1