M30800SAGP#U5 Renesas Electronics America, M30800SAGP#U5 Datasheet - Page 125

• Manufacturer Part Number: M30800SAGP#U5
• Description: IC M32C/80 MCU ROMLESS 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30800SAGP#U5

• Core Processor: M16C/80
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 45
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

R
R
M
e
E
3
. v
J
2
Figure 10.15 IIO0IE to IIO4IE Registers
0
C
1
9
0 .
8 /
B
0
0
0
2
7
G
N
1
Interrupt Enable Register
b7
o
o r
Bit Symbols for the Interrupt Enable Register
0 -
NOTES:
SIOiRE: Intelligent I/O Communication Unit i Receive Interrupt Enabled
SIOiTE: Intelligent I/O Communication Unit i Transmit Interrupt Enabled
GiTOE: Intelligent I/O Communication Unit i HDLC Data Processing Function Interrupt Enabled (TO: Output to Transmit)
GiRIE: Intelligent I/O Communication Unit i HDLC Data Processing Function Interrupt Enabled (RI: Input to Receive)
SRTiE: Intelligent I/O Special Communication Function Interrupt Enabled
-: Reserved Bit. Set to "0".
. v
Symbol
u
IIO0IE
IIO1IE
IIO2IE
IIO3IE
IIO4IE
1
1. See table below for bit symbols.
2. If an interrupt request is used for interrupt, set bit 1, 2, 4 to 7 to "1" after the IRLT bit is set to "1".
b6
0
0
p
, 1
0
b5
2
0
b4
0
Address
00B0
00B1
00B2
00B3
00B4
5
b3
0
Page 104
16
16
16
16
16
b2
0
b1
0
SRT0E
Bit 7
b0
-
-
-
-
f o
(b3 - b1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
Symbol
3
IRLT
Bit
3
SRT 1E
Symbol
IIO0IE to IIO4IE
Bit 6
0
-
-
-
-
Interrupt Request
Select Bit
Reserved Bit
SIO0RE
SIO1RE
SIO0TE
SIO1TE
Bit 5
Bit Name
-
(2)
G0TOE
G1TOE
G0RIE
G1RIE
Bit 4
-
0: Interrupt request is used for DMAC, DMAC II
1: Interrupt request is used for interrupt
Set to "0"
0: Disables an interrupt by bit 4 in IIOiIR register
1: Enables an interrupt by bit 4 in IIOiIR register
0: Disables an interrupt by bit 5 in IIOiIR register
1: Enables an interrupt by bit 5 in IIOiIR register
0: Disables an interrupt by bit 6 in IIOiIR register
1: Enables an interrupt by bit 6 in IIOiIR register
0: Disables an interrupt by bit 7 in IIOiIR register
1: Enables an interrupt by bit 7 in IIOiIR register
Bit 3
-
-
-
-
-
Address
See below
Bit 2
-
-
-
-
-
Function
Bit 1
After Reset
00
-
-
-
-
-
16
i=0, 1
IRLT
IRLT
IRLT
IRLT
IRLT
Bit 0
RW
RW
RW
RW
RW
RW
RW
10. Interrupts