M30800SAGP#U5 Renesas Electronics America, M30800SAGP#U5 Datasheet - Page 57

IC M32C/80 MCU ROMLESS 100LQFP

M30800SAGP#U5

Manufacturer Part Number
M30800SAGP#U5
Description
IC M32C/80 MCU ROMLESS 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet

Specifications of M30800SAGP#U5

Core Processor
M16C/80
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
45
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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M
R
R
e
E
3
. v
J
2
Figure 6.1 PM0 Register
0
C
1
9
0 .
8 /
B
0
0
0
2
7
G
N
1
o
o r
0 -
Processor Mode Register 0
. v
b7
u
1
NOTES:
p
0
0
, 1
b6
0
0
1. Rewrite the PM0 register after the PRC1 bit in the PRCR register is set to "1"(write enabled).
2. The PM01 and PM00 bits maintain values set before reset, even after software reset or watchdog
3. Do not change the PM01 and PM00 bits to "01
4. The PM04 and PM05 bits are available in memory expansion mode or microprocessor mode.
5. The PM05 and PM04 bits cannot be set to "11
6. No BCLK is output in single-chip mode even if the PM07 bit is set to "0". When a clock output is
7. When the PM07 bit is set to "0" (BCLK output), set the CM01 and CM00 bits to "00
2
b5
timer reset has performed.
rewritten. Set PM07 to PM02 bits, then the PM01 and PM00 bits.
starts up with separate bus after reset.
When the PM05 and PM04 bits are set to "11
access each 64-Kbyte chip-select-assigned address space. The multiplexed bus is not available in
mode 0. The microcomputer accesses the CS0 to CS2 in mode 1, CS0 and CS1 in mode 2 and
CS0 to CS3 in mode 3.
terminated in microprocessor mode or memory expansion mode, set the PM07 bit to "1" and the
CM01 and CM00 bits in the CM0 register to "00
0
0
5
b4
• Set the PM05 and PM04 bits to "00
• Do not set the PM05 and PM04 bits to "01
b3
Page 36
b2
b1
b0
f o
3
Symbol
PM00
PM01
PM02
PM03
PM04
PM05
PM07
3
(b6)
Bit
0
Symbol
PM0
R/W Mode Select Bit
Software Reset Bit
Reserved Bit
BCLK Output
Disable Bit
Multiplexed Bus Space
Select Bit
Processor Mode Bit
(1)
Bit Name
2
" in mode 0.
(4)
(6)
Address
0004
2
2
" in memory expansion mode, the microcomputer can
2
2
" in microprocessor mode since the microcomputer
" and "11
2
16
" in mode 2.
" (I/O port P5
(2, 3)
2
b1 b0
0 0: Single-chip mode
0 1: Memory expansion mode
1 0: Do not set to this value
1 1: Microprocessor mode
0: RD/BHE/WR
1: RD/WRH/WRL
The microcomputer is reset when
this bit is set to "1". When read, its
content is "0".
0 0: Multiplexed bus is not used
0 1: Access the CS2 area using the bus
1 0: Access the CS1 area using the bus
1 1: Access all CS areas using the bus
Set to "0"
0: BCLK is output
1: BCLK is not output
" when the PM07 to PM02 bits are being
b5 b4
CM0 register determine pin functions
The CM01 and CM00 bits in the
3
). P5
3
outputs "L".
After Reset
0000 0011
Function
(7)
2
2
".
(8)
(8)
6. Processor Mode
(5)
RW
RW
RW
RW
RW
RW
RW
RW
RW

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