M30800SAGP#U5 Renesas Electronics America, M30800SAGP#U5 Datasheet - Page 339

• Manufacturer Part Number: M30800SAGP#U5
• Description: IC M32C/80 MCU ROMLESS 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30800SAGP#U5

• Core Processor: M16C/80
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 45
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

M
R
R
e
E
3
24.8 Timer
. v
J
2
0
C
1
24.8.1 Timers A and B
24.8.2 Timer A
9
8 /
0 .
B
Timers stop after reset. Set the TAiS(i=0 to 4) bit or TBjS(j=0 to 5) bit in the TABSR register or TBSR
register to "1" (starts counting) after setting operating mode, count source and counter.
The following registers and bits must be set while the TAiS bit or TBjS bit is set to "0" (stops counting).
The TA1
is applied to the NMI pin while the INV03 and INV02 bits in the INVC0 register are set to "11
cutoff of the three-phase output by an "L" signal applied to the NMI pin).
• TAiMR, TBjMR register
• TAi, TBj register
• UDF register
• TAZIE, TA0TGL, TA0TGH bits in the ONSF register
• TRGSR register
0
0
0
24.8.2.1 Timer A (Timer Mode)
24.8.2.2 Timer A (Event Counter Mode)
2
G
7
N
1
• The TAiS bit (i=0 to 4) in the TABSR register is set to "0" (stops counting) after reset. Set the TAiS
• The TAi register indicates the counter value during counting at any given time. However, the
• The TAiS (i=0 to 4) bit in the TABSR register is set to "0" (stops counting) after reset. Set the TAiS
• The TAi register indicates the counter values during counting at any given time. However, the
o
o r
0 -
bit to "1" (starts counting) after selecting an operating mode and setting the TAi register.
counter is "FFFF
while the counter stops and before the counter starts counting.
bit to "1" (starts counting) after selecting an operating mode and setting the TAi register.
counter will be "FFFF
ting value can be read after setting the TAi register while the counter stops and before the counter
starts counting.
. v
u
1
p
0
0
OUT
, 1
0
2
, TA2
0
0
5
_______
Page 318
OUT
and TA4
16
" when reloading. The setting value can be read after setting the TAi register
16
f o
" during underflow and "0000
3
OUT
3
0
pins are placed in high-impedance states when a low-level ("L") signal
16
" during overflow, when reloading. The set-
_______
24. Precautions (Timer)
2
" (forced