M30800SAGP#U5 Renesas Electronics America, M30800SAGP#U5 Datasheet - Page 210

• Manufacturer Part Number: M30800SAGP#U5
• Description: IC M32C/80 MCU ROMLESS 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30800SAGP#U5

• Core Processor: M16C/80
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 45
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

R
R
M
e
E
3
. v
J
2
Figure 16.18 TxD and RxD I/O Polarity Inverse
0
C
16.2.4 TxD and RxD I/O Polarity Inverse
1
9
0 .
8 /
B
TxD pin output and RxD pin input are inversed. All I/O data level, including the start bit, stop bit and parity
bit, are inversed. Figure 16.18 shows TxD and RxD I/O polarity inverse.
0
0
0
2
7
G
N
1
o
o r
0 -
. v
u
1
Transfer Clock
Transfer Clock
(1) When the IOPOL bit in the UiMR register (i=0 to 4) is set to "0" (no inverse)
(2) When the IOPOL bit in the UiMR register is set to "1" (inverse)
0
0
p
NOTE:
, 1
0
(no inverse)
(no inverse)
1. The above applies when the UFORM bit in the UiC0 register is set to "0" (LSB
2
0
(inverse)
(inverse)
first), the STPS bit in the UiMR bit is set to "0" (1 stop bit) and the PRYE bit is
set to "1" (parity enabled).
0
5
RxD
RxD
TxD
TxD
Page 189
i
i
i
i
"H"
"H"
"H"
"L"
"L"
"L"
"H"
"H"
"H"
"L"
"L"
"L"
f o
3
ST
ST
ST
ST
3
0
D
D
D
D
0
0
0
0
D
D
D
D
1
1
1
1
D
D
D
D
2
2
2
2
D
D
D
D
3
3
3
3
D
D
D
D
4
4
4
4
D
D
D
D
5
5
5
5
D
D
D
D
6
6
6
6
D
D
D
D
7
7
7
7
P
P
P
P
ST: Start bit
P: Even parity
SP: Stop bit
SP
SP
SP
SP
16. Serial I/O (UART)