D12312SVF20V Renesas Electronics America, D12312SVF20V Datasheet - Page 134
D12312SVF20V
Manufacturer Part Number
D12312SVF20V
Description
IC H8S/2312S MCU ROMLESS 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of D12312SVF20V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
70
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D12312SVF20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 4 Exception Handling
4.1.2
Exceptions originate from various sources. Trap instructions and interrupts are handled as
follows:
1. The program counter (PC), condition code register (CCR), and extend register (EXR) are
2. The interrupt mask bits are updated. The T bit is cleared to 0.
3. A vector address corresponding to the exception source is generated, and program execution
For a reset exception, steps 2 and 3 above are carried out.
4.1.3
The exception sources are classified as shown in figure 4.1. Different vector addresses are
assigned to different exception sources.
Table 4.2 lists the exception sources and their vector addresses.
In modes 6 and 7, the on-chip ROM available for use after a power-on reset is the 64-kbyte area
comprising addresses H'000000 to H'00FFFF. Care is required when setting vector addresses. In
this case, clearing the EAE bit in BCRL enables the 256-kbyte (128 kbytes/384 kbytes/512 kbytes)
area * comprising addresses H'000000 to H'03FFFF (to H'01FFFF/H'05FFFF/H'07FFFF) to be
used.
Note: * The different have different amounts of on-chip ROM. For details, see section 6.2.5, Bus
Rev.7.00 Feb. 14, 2007 page 100 of 1108
REJ09B0089-0700
pushed onto the stack.
starts from that address.
Control Register L (BCRL).
Exception Handling Operation
Exception Vector Table
Exception
sources
• Reset
• Trace
• Interrupts
• Trap instruction
Figure 4.1 Exception Sources
External interrupts: NMI, IRQ7 to IRQ0
Internal interrupts: interrupts from on-chip
supporting modules
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