D12312SVF20V Renesas Electronics America, D12312SVF20V Datasheet - Page 81

• Manufacturer Part Number: D12312SVF20V
• Description: IC H8S/2312S MCU ROMLESS 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12312SVF20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• For Use With: EDK2329 - DEV EVALUATION KIT H8S/2329
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Type
Arithmetic
operations
Instruction
DIVXS
CMP
NEG
EXTU
EXTS
TAS
Size *
B/W
B/W/L
B/W/L
W/L
W/L
B
1
Function
Rd ÷ Rs → Rd
Performs signed division on data in two general
registers: either 16 bits ÷ 8 bits → 8-bit quotient and 8-bit
remainder or 32 bits ÷ 16 bits → 16-bit quotient and 16-
bit remainder.
Compares data in a general register with data in another
general register or with immediate data, and sets CCR
bits according to the result.
Takes the two's complement (arithmetic complement) of
data in a general register.
Extends the lower 8 bits of a 16-bit register to word size,
or the lower 16 bits of a 32-bit register to longword size,
by padding with zeros on the left.
Extends the lower 8 bits of a 16-bit register to word size,
or the lower 16 bits of a 32-bit register to longword size,
by extending the sign bit.
Tests memory contents, and sets the most significant bit
(bit 7) to 1.
Rd – Rs, Rd – #IMM
0 – Rd → Rd
Rd (zero extension) → Rd
Rd (sign extension) → Rd
@ERd – 0, 1 → (<bit 7> of @Erd) *
Rev.7.00 Feb. 14, 2007 page 47 of 1108
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REJ09B0089-0700
Section 2 CPU