HD64F3664BPV Renesas Electronics America, HD64F3664BPV Datasheet - Page 275

MCU 3/5V 32K,PB-FREE 42-DIP

HD64F3664BPV

Manufacturer Part Number
HD64F3664BPV
Description
MCU 3/5V 32K,PB-FREE 42-DIP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet

Specifications of HD64F3664BPV

Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
I²C, SCI
Peripherals
PWM, WDT
Number Of I /o
29
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
42-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
15.3.6
The I
Bit
0
Bit
7
6
2
C bus status register (ICSR) consists of status flags. Also see table 15.4.
I
2
Bit Name
SCP
Bit Name
ESTP
STOP
C Bus Status Register (ICSR)
Initial
Value
1
Initial
Value
0
0
R/W
W
R/W
R/W
R/W
Description
Start Condition/Stop Condition Prohibit
The SCP bit controls the issue of start/stop conditions
in master mode.
To issue a start condition, write 1 in BBSY and 0 in
SCP. A retransmit start condition is issued in the same
way. To issue a stop condition, write 0 in BBSY and 0 in
SCP. This bit is always read as 1. If 1 is written, the
data is not stored.
Description
Error Stop Condition Detection Flag
This bit is valid in I
[Setting condition]
When a stop condition is detected during frame
transfer.
[Clearing conditions]
Normal Stop Condition Detection Flag
This bit is valid in I
[Setting condition]
When a stop condition is detected during frame
transfer.
[Clearing conditions]
When 0 is written in ESTP after reading ESTP = 1
When the IRIC flag is cleared to 0
When 0 is written in STOP after reading STOP = 1
When the IRIC flag is cleared to 0
2
2
Rev. 6.00 Mar. 24, 2006 Page 245 of 412
C bus format slave mode.
C bus format slave mode.
Section 15 I
2
C Bus Interface (IIC)
REJ09B0142-0600

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