DF36034GFPJ Renesas Electronics America, DF36034GFPJ Datasheet - Page 403
![MCU 3/5V 32K J-TEMP POR&LVD 64-L](/photos/28/61/286100/64-lqfp__plqp0064kb-a_sml.jpg)
DF36034GFPJ
Manufacturer Part Number
DF36034GFPJ
Description
MCU 3/5V 32K J-TEMP POR&LVD 64-L
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet
1.DF36057GFZV.pdf
(594 pages)
Specifications of DF36034GFPJ
Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SSU
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
45
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F36034GFPJ
HD64F36034GFPJ
HD64F36034GFPJ
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Figure 16.9 Sample Flowchart for Serial Transmit and Receive Operations
[1]
[2]
[3]
[4]
[5]
No
No
Read RDRF in SSSR
Read TDRE in SSSR
Read TEND in SSSR
Clear TEND to 0 and
Write transmit data
clear TE and RE in
Read receive data
Data transmission
Initialization
RDRF = 1?
TDRE = 1?
TEND = 1?
SSER to 0
in SSRDR
in SSTDR
continued?
Start
End
No
Yes
Yes
Yes
Yes
No
Section 16 Synchronous Serial Communication Unit (SSU)
[2] Confirm that the RDRF bit is 1. If the RDRF
[3] Determine whether data transmission is continued.
[4] Data transfer completion can be confirmed
[5] To end transmit and receive mode, clear the
[1] After reading SSSR and confirming that
TEND bit to 0 and clear the TE and RE bits in
bit is 1, receive data in SSRDR is read. If the
SSRDR bit is read, the RDRF bit is automatically
cleared.
to see if TEND in SSSR becomes 1.
SSER to 0.
the TDRE bit is 1, write transmit data in
SSTDR. Then the TDRE bit is automatically
cleared to 0.
Rev. 4.00 Mar. 15, 2006 Page 369 of 556
REJ09B0026-0400
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