MCF5214CVF66J Freescale Semiconductor, MCF5214CVF66J Datasheet - Page 112

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MCF5214CVF66J

Manufacturer Part Number
MCF5214CVF66J
Description
IC MCU 256K FLASH 256MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF521xr
Datasheet

Specifications of MCF5214CVF66J

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
CAN, EBI/EMI, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
142
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Processor Series
MCF521x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
M52210DEMO, M52211EVB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF5214CVF66J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Static RAM (SRAM)
The following loop initializes the entire SRAM to zero
lea.l
move.l
SRAM_INIT_LOOP:
clr.l
subq.l
bne.b
5.3.4
As noted previously, depending on the configuration defined by the RAMBAR, instruction fetch and
operand read accesses may be sent to the SRAM and cache simultaneously. If the access is mapped to the
SRAM module, it sources the read data and the unified cache access is discarded. If the SRAM is used
only for data operands, asserting the ASn bits associated with instruction fetches can decrease power
dissipation. Additionally, if the SRAM contains only instructions, masking operand accesses can reduce
power dissipation.
5-4
Power Management
Table 5-2
RAMBASE,A0
#16384,D0
(A0)+)
#1,D0
SRAM_INIT_LOOP
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Data Contained in SRAM
Both Code And Data
shows some examples of typical RAMBAR settings.
Table 5-2. Typical RAMBAR Setting Examples
Code Only
Data Only
;load pointer to SRAM
;load loop counter into D0
;clear 4 bytes of SRAM
;decrement loop counter
;if done, then exit; else continue looping
RAMBAR[7:0]
0x2B
0x35
0x21
Freescale Semiconductor

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