HD6417034AFI20 Renesas Electronics America, HD6417034AFI20 Datasheet - Page 172

• Manufacturer Part Number: HD6417034AFI20
• Description: IC SUPERH MPU ROMLESS 112QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7030r

Specifications of HD6417034AFI20

• Core Processor: SH-1
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Section 8 Bus State Controller (BSC)
8.4.3
The upper byte and lower byte control signals when 16-bit bus width space is being accessed can
be selected from (WRH, WRL, A0) or (WR, HBS, LBS). When the byte access select bit (BAS) in
BCR is set to 1, the WRH, WRL, and A0 pins output WR, LBS, and HBS signals. Figure 8.15
illustrates the control signal output timing in the byte write cycle.
The WRH, WRL system and the HBS, LBS system are available as byte access signals for 16-bit
space in address/data multiplexing space and external memory space.
These strobe signals are assigned to pins in the manner: A0/HBS, WRH/LBS, WRL/WR, and the
BAS bit in the bus control register (BCR) is used to switch specify signal sending.
Note that the byte access signals are strobe signals specifically for byte access to a 16-bit space
and are not to be used for byte access to an 8-bit space. When making an access to an 8-bit space,
use the A0/HBS pin as A0 irrespective of the BAS bit value to use the WRL/WR pin as the WR
pin, and avoid using the WRH/LBS pin.
Rev. 7.00 Jan 31, 2006 page 144 of 658
REJ09B0272-0700
Figure 8.15 Byte Access Control Timing For External Memory Space Access (Write Cycle)
BAS = 0
BAS = 1
Byte Access Control
WRH
WRL
HBS
LBS
WR
CK
A0
Upper byte access
T1
T2
Lower byte access
T1
T2