DF2505FC26V Renesas Electronics America, DF2505FC26V Datasheet - Page 622

IC H8S/2505 MCU FLASH 144QFP

DF2505FC26V

Manufacturer Part Number
DF2505FC26V
Description
IC H8S/2505 MCU FLASH 144QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2500r
Datasheets

Specifications of DF2505FC26V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
26MHz
Connectivity
I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
104
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Section 17 IEBus™ Controller (IEB) [H8S/2552 Group]
Rev. 6.00 Sep. 24, 2009 Page 574 of 928
REJ09B0099-0600
Bit
3
2
1
Bit Name
LCK
RSS
Initial
Value
0
0
0
R/W
R
R
R
Description
Lock Status Indication
Set to 1 when a unit is locked by a lock request from the
master unit. IELA1 and IELA2 values are valid only when
this flag is set to 1.
1: A unit is locked
[Setting condition]
0: A unit is unlocked
[Clearing condition]
Reserved
This bit is always read as 0.
Receive Broadcast Bit Status
Indicates the received broadcast bit value. This flag is valid
when the slave/broadcast reception is started. (This flag is
changed at the timing of setting the RxS flag in IERSR.)
The previous value remains unchanged until the next
slave/broadcast reception is started.
When data for the number of bytes specified by the
message length is not received after the control bits
that make the unit locked are received from the master
unit. (The LCK flag is set to 1 only when the message
length exceeds the maximum number of transfer bytes
in one frame. This flag is not set by completion of other
errors.)
When an unlock condition is satisfied or when an
unlock command is issued.

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