DF2505FC26V Renesas Electronics America, DF2505FC26V Datasheet - Page 678

• Manufacturer Part Number: DF2505FC26V
• Description: IC H8S/2505 MCU FLASH 144QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2500r

Specifications of DF2505FC26V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 26MHz
• Connectivity: I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 18 Controller Area Network (HCAN) [H8S/2556 Group]
18.3.14 Receive Error Counter (REC)
REC is an 8-bit read-only register that functions as a counter indicating the number of receive
message errors on the CAN bus. The count value is stipulated in the CAN protocol.
18.3.15 Transmit Error Counter (TEC)
TEC is an 8-bit read-only register that functions as a counter indicating the number of transmit
message errors on the CAN bus. The count value is stipulated in the CAN protocol.
18.3.16 Unread Message Status Register (UMSR)
UMSR is a status register that indicates, for individual mailboxes, that a received message has
been overwritten by a new receive message before being read. When overwritten by a new
message, data in the unread receive message is lost.
Note:
Rev. 6.00 Sep. 24, 2009 Page 630 of 928
REJ09B0099-0600
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit Name
UMSR7
UMSR6
UMSR5
UMSR4
UMSR3
UMSR2
UMSR1
UMSR0
UMSR15
UMSR14
UMSR13
UMSR12
UMSR11
UMSR10
UMSR9
UMSR8
*
Only 1 can be written to this bit for clearing the flag.
Initial
Value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
Description
Indicates that a received massage has been overwritten by
a new message before being read.
[Setting condition]
When a new message is received before RXPR is cleared
[Clearing condition]
Writing 1