UPD78F9221CS-CAC-A Renesas Electronics America, UPD78F9221CS-CAC-A Datasheet - Page 228

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UPD78F9221CS-CAC-A

Manufacturer Part Number
UPD78F9221CS-CAC-A
Description
MCU 8BIT 2KB FLASH 20PIN
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet

Specifications of UPD78F9221CS-CAC-A

Core Processor
78K0S
Core Size
8-Bit
Speed
10MHz
Connectivity
LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
226
Address: FFECH
Symbol
INTM0
(3)
External interrupt mode register 0 (INTM0)
This register is used to set the valid edge of INTP0 to INTP2.
INTM0 is set with an 8-bit memory manipulation instruction.
Reset signal generation clears INTM0 to 00H.
Cautions 1. Be sure to clear bits 0 and 1 to 0.
ES21
ES21
ES11
ES01
0
0
1
1
7
0
0
1
1
0
0
1
1
After reset: 00H
ES20
ES10
ES00
2. Before setting the INTM0 register, be sure to set the corresponding interrupt mask flag
ES20
6
0
1
0
1
0
1
0
1
0
1
0
1
Figure 12-4. Format of External Interrupt Mode Register 0 (INTM0)
(
request flag (
enable interrupts.
MK = 1) to disable interrupts. After setting the INTM0 register, clear the interrupt
Falling edge
Rising edge
Setting prohibited
Both rising and falling edges
Falling edge
Rising edge
Setting prohibited
Both rising and falling edges
Falling edge
Rising edge
Setting prohibited
Both rising and falling edges
ES11
5
R/W
ES10
CHAPTER 12 INTERRUPT FUNCTIONS
4
IF
= 0), then clear the interrupt mask flag (
User’s Manual U16898EJ6V0UD
ES01
3
ES00
2
INTP2 valid edge selection
INTP1 valid edge selection
INTP0 valid edge selection
1
0
0
0
MK
= 0), which will

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