UPD78F9221CS-CAC-A Renesas Electronics America, UPD78F9221CS-CAC-A Datasheet - Page 39

• Manufacturer Part Number: UPD78F9221CS-CAC-A
• Description: MCU 8BIT 2KB FLASH 20PIN
• Manufacturer: Renesas Electronics America
• Series: 78K0S/Kx1+r

Specifications of UPD78F9221CS-CAC-A

• Core Processor: 78K0S
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

3.2.3 Special function registers (SFRs)
bit manipulation instructions. Manipulatable bit units (1, 8, and 16) differ depending on the special function register
type.
Unlike the general-purpose registers, each special function register has a special function.
The special function registers are allocated to the 256-byte area FF00H to FFFFH.
The special function registers can be manipulated, like the general-purpose registers, with operation, transfer, and
Each manipulation bit unit can be specified as follows.
Table 3-3 lists the special function registers. The meanings of the symbols in this table are as follows:
1-bit manipulation
Describes a symbol reserved by the assembler for the 1-bit manipulation instruction operand (sfr.bit). This
manipulation can also be specified with the address and bit.
8-bit manipulation
Describes a symbol reserved by the assembler for the 8-bit manipulation instruction operand (sfr).
manipulation can also be specified with an address.
16-bit manipulation
Describes a symbol reserved by the assembler for the 16-bit manipulation instruction operand. When specifying
an address, describe an even address.
Symbol
Indicates the addresses of the implemented special function registers. It is defined as a reserved word in the
RA78K0S, and is defined as an sfr variable using the #pragma sfr directive in the CC78K0S. Therefore, these
symbols can be used as instruction operands if an assembler or integrated debugger is used.
15
Figure 3-12. General-Purpose Register Configuration (2/2)
16-bit processing
RP3
RP2
RP1
RP0
CHAPTER 3 CPU ARCHITECTURE
User’s Manual U16898EJ6V0UD
0
(b) Absolute names
7
8-bit processing
R7
R6
R5
R4
R3
R2
R1
R0
0
This
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