UPD78F9221CS-CAC-A Renesas Electronics America, UPD78F9221CS-CAC-A Datasheet - Page 287

• Manufacturer Part Number: UPD78F9221CS-CAC-A
• Description: MCU 8BIT 2KB FLASH 20PIN
• Manufacturer: Renesas Electronics America
• Series: 78K0S/Kx1+r

Specifications of UPD78F9221CS-CAC-A

• Core Processor: 78K0S
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(4) Flash programming command register (FLCMD)
2. Operating conditions of VCERR flag
3. Operating conditions of WEPRERR flag
<Reset conditions>
<Setting conditions>
<Reset conditions>
<Setting conditions>
<Reset conditions>
This register is used to specify whether the flash memory is erased, written, or verified in the self programming
mode.
This register is set with a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
If a value other than the inverted value of the value to be set to FLPMC is written by the first store instruction
after <2>
If the first store instruction operation after <3> is on a peripheral register other than FLPMC
If a value other than the value to be set to FLPMC (value written in <2>) is written by the first store instruction
after <3>
Remark The numbers in angle brackets above correspond to the those in (2) Flash protect command
If 0 is written to the FPRERR flag
If the reset signal is generated
Erasure verification error
Internal writing verification error
If VCERR is set, it means that the flash memory has not been erased or written correctly. Erase or write the
memory again in the specified procedure.
Remark The VCERR flag may also be set if an erase or write protect error occurs.
When 0 is written to the VCERR flag
When the reset signal is generated
If the area specified by the protect byte to be protected from erasing or writing is specified by the flash
address pointer H (FLAPH) and a command is executed to this area
If 1 is written to a bit that has not been erased (a bit for which the data is 0).
When 0 is written to the WEPRERR flag
When the reset signal is generated
register (PFCMD).
CHAPTER 18 FLASH MEMORY
User’s Manual U16898EJ6V0UD
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