UPD78F0513AGB-GAF-AX Renesas Electronics America, UPD78F0513AGB-GAF-AX Datasheet - Page 249
UPD78F0513AGB-GAF-AX
Manufacturer Part Number
UPD78F0513AGB-GAF-AX
Description
MCU 8BIT 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet
1.UPD78F0500MC-5A4-A.pdf
(982 pages)
Specifications of UPD78F0513AGB-GAF-AX
Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
(2) Example of setting procedure when using the external main system clock
(3) Example of setting procedure when using high-speed system clock as CPU clock and peripheral hardware
<4> Waiting for the stabilization of the oscillation of X1 clock
Cautions 1. Do not change the value of EXCLK and OSCSEL while the X1 clock is operating.
<1> Setting frequency (OSCCTL register)
<2> Setting P121/X1 and P122/X2/EXCLK pins and selecting operation mode (OSCCTL register)
<3> Controlling external main system clock input (MOC register)
Cautions 1. Do not change the value of EXCLK and OSCSEL while the external main system clock is
clock
<1> Setting high-speed system clock oscillation
Check the OSTC register and wait for the necessary time.
During the wait time, other software processing can be executed with the internal high-speed oscillation clock.
Using AMPH, set the frequency to be used.
Note Set AMPH before setting the peripheral functions after a reset release. The value of AMPH can be
Remark f
When EXCLK and OSCSEL are set to 1, the mode is switched from port mode to external clock input mode.
When MSTOP is cleared to 0, the input of the external main system clock is enabled.
(See 6.6.1 (1) Example of setting procedure when oscillating the X1 clock and (2) Example of setting
procedure when using the external main system clock.)
Note The setting of <1> is not necessary when high-speed system clock is already operating.
AMPH
EXCLK
2. Set the X1 clock after the supply voltage has reached the operable voltage of the clock to be
2. Set the X1 clock after the supply voltage has reached the operable voltage of the clock to be
0
1
1
changed only once after a reset release. The clock supply to the CPU is stopped for the duration of
160 external clocks after AMPH is set to 1.
Note
used (see CHAPTER 30
CHAPTER 33 ELECTRICAL SPECIFICATIONS ((A2) GRADE PRODUCTS: T
operating.
used (see CHAPTER 30
CHAPTER 33 ELECTRICAL SPECIFICATIONS ((A2) GRADE PRODUCTS: T
XH
1 MHz ≤ f
10 MHz < f
: High-speed system clock oscillation frequency
OSCSEL
1
XH
XH
External clock input mode
≤ 10 MHz
Speed System Clock Pin
Operation Mode of High-
≤ 20 MHz
Operating Frequency Control
ELECTRICAL SPECIFICATIONS (STANDARD PRODUCTS) to
ELECTRICAL SPECIFICATIONS (STANDARD PRODUCTS) to
Note
I/O port
P121/X1 Pin
CHAPTER 6 CLOCK GENERATOR
External clock input
P122/X2/EXCLK Pin
A
A
= −40 to +125°C)).
= −40 to +125°C)).
249
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