UPD78F0513AGB-GAF-AX Renesas Electronics America, UPD78F0513AGB-GAF-AX Datasheet - Page 432
UPD78F0513AGB-GAF-AX
Manufacturer Part Number
UPD78F0513AGB-GAF-AX
Description
MCU 8BIT 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet
1.UPD78F0500MC-5A4-A.pdf
(982 pages)
Specifications of UPD78F0513AGB-GAF-AX
Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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78K0/Kx2
14.1 Functions of Serial Interface UART0
(2) Asynchronous serial interface (UART) mode
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
(1) Operation stop mode
Serial interface UART0 are mounted onto all 78K0/Kx2 microcontroller products.
Serial interface UART0 has the following two modes.
This mode is used when serial communication is not executed and can enable a reduction in the power consumption.
For details, see 14.4.1 Operation stop mode.
The functions of this mode are outlined below.
For details, see 14.4.2 Asynchronous serial interface (UART) mode and 14.4.3 Dedicated baud rate generator.
• Maximum transfer rate: 625 kbps
• Two-pin configuration
• Length of communication data can be selected from 7 or 8 bits.
• Dedicated on-chip 5-bit baud rate generator allowing any baud rate to be set
• Transmission and reception can be performed independently (full-duplex operation).
• Fixed to LSB-first communication
Cautions 1. If clock supply to serial interface UART0 is not stopped (e.g., in the HALT mode), normal
2. Set POWER0 = 1 and then set TXE0 = 1 (transmission) or RXE0 = 1 (reception) to start
3. TXE0 and RXE0 are synchronized by the base clock (f
4. Set transmit data to TXS0 at least one base clock (f
operation continues. If clock supply to serial interface UART0 is stopped (e.g., in the STOP
mode), each register stops operating, and holds the value immediately before clock supply was
stopped. The T
outputs it. However, the operation is not guaranteed after clock supply is resumed. Therefore,
reset the circuit so that POWER0 = 0, RXE0 = 0, and TXE0 = 0.
communication.
transmission or reception again, set TXE0 or RXE0 to 1 at least two clocks of base clock after
TXE0 or RXE0 has been cleared to 0. If TXE0 or RXE0 is set within two clocks of base clock, the
transmission circuit or reception circuit may not be initialized.
T
R
X
X
D0: Transmit data output pin
D0: Receive data input pin
CHAPTER 14 SERIAL INTERFACE UART0
X
D0 pin also holds the value immediately before clock supply was stopped and
CHAPTER 14 SERIAL INTERFACE UART0
XCLK0
) after setting TXE0 = 1.
XCLK0
) set by BRGC0.
To enable
432
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