UPD78F0513AGB-GAF-AX Renesas Electronics America, UPD78F0513AGB-GAF-AX Datasheet - Page 588

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UPD78F0513AGB-GAF-AX

Manufacturer Part Number
UPD78F0513AGB-GAF-AX
Description
MCU 8BIT 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet

Specifications of UPD78F0513AGB-GAF-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F0513AGB-GAF-AX
Manufacturer:
SEMIKRON
Quantity:
21
Part Number:
UPD78F0513AGB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
D
MSTS0 = 1?
IICBSY = 0?
STCF = 0?
STT0 = 1
STT0 = 1
Wait
Wait
A
C
B
C
Yes
Yes
Yes
Enables reserving communication.
Disables reserving communication.
Figure 18-24. Master Operation in Multi-Master System (2/3)
Wait state after stop condition
was detected and start condition
was generated by the communication
reservation function.
No
No
No
Prepares for starting communication
(generates a start condition).
Secure wait time by software
(see Table 18-6).
Prepares for starting communication
(generates a start condition).
Secure wait time by software
(see Table 18-7).
No
EXC0 = 1 or COI0 =1?
EXC0 = 1 or COI0 =1?
interrupt occurs?
interrupt occurs?
Slave operation
Slave operation
CHAPTER 18 SERIAL INTERFACE IIC0
INTIIC0
INTIIC0
Yes
Yes
Yes
Yes
No
No
No
Waits for bus release
(communication being reserved).
Waits for bus release
Detects a stop condition.
D
588

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