UPD78F0513AGB-GAF-AX Renesas Electronics America, UPD78F0513AGB-GAF-AX Datasheet - Page 440
UPD78F0513AGB-GAF-AX
Manufacturer Part Number
UPD78F0513AGB-GAF-AX
Description
MCU 8BIT 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet
1.UPD78F0500MC-5A4-A.pdf
(982 pages)
Specifications of UPD78F0513AGB-GAF-AX
Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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78K0/Kx2
(4) Port mode register 1 (PM1)
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Note 2. Note the following points when selecting the TM50 output as the base clock.
Cautions 1. Make sure that bit 6 (TXE0) and bit 5 (RXE0) of the ASIM0 register = 0 when rewriting the MDL04
Remarks 1. f
This register sets port 1 input/output in 1-bit units.
When using the P10/TxD0/SCK10 pin for serial interface data output, clear PM10 to 0 and set the output latch of P10
to 1.
When using the P11/RxD0/SI10 pin for serial interface data input, set PM11 to 1. The output latch of P11 at this time
may be 0 or 1.
PM1 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to FFH.
Address: FF21H
Symbol
PM1
• Mode in which the count clock is cleared and started upon a match of TM50 and CR50 (TMC506 = 0)
• PWM mode (TMC506 = 1)
It is not necessary to enable (TOE50 = 1) TO50 output in any mode.
2. Make sure that bit 7 (POWER0) of the ASIM0 register = 0 when rewriting the TPS01 and TPS00
3. The baud rate value is the output clock of the 5-bit counter divided by 2.
2. f
3. k:
4. ×:
5. TMC506: Bit 6 of 8-bit timer mode control register 50 (TMC50)
Start the operation of 8-bit timer/event counter 50 first and then enable the timer F/F inversion operation
(TMC501 = 1).
Start the operation of 8-bit timer/event counter 50 first and then set the count clock to make the duty = 50%.
to MDL00 bits.
bits.
PM17
PM1n
TMC501: Bit 1 of TMC50
XCLK0
PRS
7
0
1
:
After reset: FFH
: Frequency of base clock selected by the TPS01 and TPS00 bits
Peripheral hardware clock frequency
Value set by the MDL04 to MDL00 bits (k = 8, 9, 10, ..., 31)
Don’t care
Output mode (output buffer on)
Input mode (output buffer off)
PM16
6
Figure 14-5. Format of Port Mode Register 1 (PM1)
PM15
5
R/W
P1n pin I/O mode selection (n = 0 to 7)
PM14
4
PM13
3
CHAPTER 14 SERIAL INTERFACE UART0
PM12
2
PM11
1
PM10
0
440
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