UPD70F3768GF-GAT-AX Renesas Electronics America, UPD70F3768GF-GAT-AX Datasheet - Page 1140

• Manufacturer Part Number: UPD70F3768GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-U 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Ur

Specifications of UPD70F3768GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
(22) HcRhPortStatus1/2 register (Offset 54H/58H)
30 to 21
20
19
18
Bit position R/W
After reset: 0000 0000H
(a) When read
(b) When written
−
−
−
−
PRSC
OCIC
PSSC
Bit name
−
31
15
31
15
23
23
0
0
0
7
0
0
0
0
7
0
R/W
Reserved. (Be sure to write “0” to these bits.)
Port Reset Status Change
Indicates the completion of port reset.
This bit is set (1) when hardware reset of 10 ms is completed.
This bit is cleared (0) when “1” is written via the host controller driver (HCD).
Overcurrent Indicate Change
This bit is set (1) when the overcurrent status is detected at a port.
This bit is cleared (0) when “1” is written via the host controller driver (HCD).
Port Suspend Status Change
Indicates that the RESUME sequence has completed.
This bit is set when all of RESUME processing is completed by hardware.
This bit is cleared to 0 when “1” is written via the host controller driver (HCD).
1: Port reset has completed.
0: The port reset status has not changed.
1: The overcurrent state has changed.
0: The overcurrent state has not changed.
1: RESUME has completed.
0: Port Suspend Status has not changed.
30
22
14
30
22
14
0
0
0
6
0
0
0
0
6
0
29
21
13
29
21
13
0
0
0
5
0
0
0
0
5
0
PRSC
PRSC
PRS
SPR
28
12
28
12
20
20
0
0
4
0
0
4
CHAPTER 21 USB HOST CONTROLLER (USBH)
Function
OCIC
POCI
OCIC
CSS
27
19
11
27
19
11
0
0
3
0
0
3
PSSC
PSSC
PSS
SPS
26
18
10
26
18
10
0
0
2
0
0
2
LSDA
PESC
PESC
PES
CPP
SPE
25
17
25
17
9
1
9
1
0
0
CSC
PPS
CSC
CSC
CPE
SPP
24
16
24
16
8
0
8
0
0
0
Page 1140 of 1408
(1/4)