UPD70F3768GF-GAT-AX Renesas Electronics America, UPD70F3768GF-GAT-AX Datasheet - Page 13

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UPD70F3768GF-GAT-AX

Manufacturer Part Number
UPD70F3768GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-U 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet

Specifications of UPD70F3768GF-GAT-AX

Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3768GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
CHAPTER 19 I
18.7 Output Pins ............................................................................................................................. 810
18.8 Baud Rate Generator ............................................................................................................. 811
18.9 Cautions .................................................................................................................................. 813
19.1 Mode Switching of I
19.2 Features .................................................................................................................................. 817
19.3 Configuration.......................................................................................................................... 818
19.4 Registers ................................................................................................................................. 822
19.5 I
19.6 I
19.7 I
19.8 Interrupt Request Signal (INTIICn) Generation Timing and Wait Control ........................ 866
19.9 Address Match Detection Method ........................................................................................ 868
19.10 Error Detection ....................................................................................................................... 868
19.11 Extension Code ...................................................................................................................... 868
19.12 Arbitration ............................................................................................................................... 869
19.13 Wakeup Function ................................................................................................................... 870
19.14 Communication Reservation ................................................................................................ 871
19.15 Cautions .................................................................................................................................. 876
19.16 Communication Operations .................................................................................................. 877
18.6.2 Single transfer mode (master mode, reception mode) ..................................................................779
18.6.3 Single transfer mode (master mode, transmission/reception mode) .............................................781
18.6.4 Single transfer mode (slave mode, transmission mode) ...............................................................783
18.6.5 Single transfer mode (slave mode, reception mode).....................................................................785
18.6.6 Single transfer mode (slave mode, transmission/reception mode)................................................787
18.6.7 Continuous transfer mode (master mode, transmission mode).....................................................789
18.6.8 Continuous transfer mode (master mode, reception mode) ..........................................................791
18.6.9 Continuous transfer mode (master mode, transmission/reception mode) .....................................794
18.6.10
18.6.11
18.6.12
18.6.13
18.6.14
18.8.1 Baud rate generation ....................................................................................................................812
19.1.1 UARTC3 and I
19.1.2 UARTC4, CSIF0, and I
19.1.3 UARTC1 and I
19.5.1 Pin configuration ...........................................................................................................................837
19.6.1 Start condition ...............................................................................................................................838
19.6.2 Addresses .....................................................................................................................................839
19.6.3 Transfer direction specification .....................................................................................................840
19.6.4 ACK ..............................................................................................................................................841
19.6.5 Stop condition ...............................................................................................................................842
19.6.6 Wait state......................................................................................................................................843
19.6.7 Wait state cancellation method .....................................................................................................845
19.7.1 Master device operation................................................................................................................846
19.7.2 Slave device operation (when receiving slave address data (address match)) .............................849
19.7.3 Slave device operation (when receiving extension code)..............................................................853
19.7.4 Operation without communication.................................................................................................857
19.7.5 Arbitration loss operation (operation as slave after arbitration loss)..............................................857
19.7.6 Operation when arbitration loss occurs (no communication after arbitration loss) ........................859
19.14.1
19.14.2
2
2
2
C Bus Mode Functions ........................................................................................................ 837
C Bus Definitions and Control Methods ............................................................................ 838
C Interrupt Request Signals (INTIICn)................................................................................ 846
2
C BUS .......................................................................................................................... 814
Continuous transfer mode (slave mode, transmission mode) ..................................................798
Continuous transfer mode (slave mode, reception mode)........................................................800
Continuous transfer mode (slave mode, transmission/reception mode)...................................803
Reception error ........................................................................................................................807
Clock timing..............................................................................................................................808
When communication reservation function is enabled (IICFn.IICRSVn bit = 0)........................871
When communication reservation function is disabled (IICFn.IICRSVn bit = 1) .......................875
2
2
C00 mode switching .............................................................................................814
C02 mode switching .............................................................................................816
2
C Bus and Other Serial Interfaces..................................................... 814
2
C01 mode switching ................................................................................815

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