AT91FR40162S-CJ Atmel, AT91FR40162S-CJ Datasheet - Page 3
AT91FR40162S-CJ
Manufacturer Part Number
AT91FR40162S-CJ
Description
IC ARM MCU FLASH 1K 121BGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91FR40162S-CJ.pdf
(210 pages)
Specifications of AT91FR40162S-CJ
Core Processor
ARM7
Core Size
16/32-Bit
Speed
75MHz
Connectivity
EBI/EMI, UART/USART
Peripherals
WDT
Number Of I /o
32
Program Memory Size
2MB (1M x 16)
Program Memory Type
FLASH
Ram Size
256K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
121-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91FR40162S-CJ
Manufacturer:
ATMEL
Quantity:
455
- Current page: 3 of 210
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3. Signal Description
Table 3-1.
6174B–ATARM–07-Nov-05
Module
USART
Timer
Reset
Clock
AIC
PIO
WD
ICE
EBI
Name
A0 - A23
D0 - D15
NCS0 - NCS3
CS4 - CS7
NWR0
NWR1
NRD
NWE
NOE
NUB
NLB
NWAIT
BMS
FIQ
IRQ0 - IRQ2
TCLK0 - TCLK2
TIOA0 - TIOA2
TIOB0 - TIOB2
SCK0 - SCK1
TXD0 - TXD1
RXD0 - RXD1
P0 - P31
NWDOVF
MCKI
MCKO
NRST
NTRI
TMS
TDI
TDO
TCK
AT91FR40162S Signal Description
Function
Address Bus
Data Bus
External Chip Select
External Chip Select
Lower Byte 0 Write Signal
Upper Byte 1 Write Signal
Read Signal
Write Enable
Output Enable
Upper Byte Select
Lower Byte Select
Wait Input
Boot Mode Select
Fast Interrupt Request
External Interrupt Request
Timer External Clock
Multi-purpose Timer I/O Pin A
Multi-purpose Timer I/O Pin B
External Serial Clock
Transmit Data Output
Receive Data Input
Parallel IO Line
Watchdog Overflow
Master Clock Input
Master Clock Output
Hardware Reset Input
Tri-state Mode Select
Test Mode Select
Test Data Input
Test Data Output
Test Clock
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Type
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
I/O
I/O
I/O
I/O
I/O
AT91FR40162S Preliminary
Active
Level
High
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Comments
Valid after reset; do not reprogram A20 to
I/O, as it is MSB of Flash address
Used to select external devices
A23 - A20 after reset
Used in Byte Write option
Used in Byte Write option
Used in Byte Write option
Used in Byte Select option
Used in Byte Select option
Used in Byte Select option
Used in Byte Select option
Sampled during reset; must be driven low
during reset for Flash to be used as boot
memory
PIO-controlled after reset
PIO-controlled after reset
PIO-controlled after reset
PIO-controlled after reset
PIO-controlled after reset
PIO-controlled after reset
PIO-controlled after reset
Open drain
Schmidt trigger
Schmidt trigger
Sampled during reset
Schmidt trigger, internal pull-up
Schmidt trigger, internal pull-up
Schmidt trigger, internal pull-up
PIO-controlled after reset
3
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