AT91SAM9261SB-CU-999 Atmel, AT91SAM9261SB-CU-999 Datasheet - Page 702

• Manufacturer Part Number: AT91SAM9261SB-CU-999
• Description: IC MCU ARM9 ULTRA LP 217LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9261SB-CU-999

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 190MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: 2-Wire, I2S, SPI, USB
• Maximum Clock Frequency: 190 MHz
• Number Of Programmable I/os: 96
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9261-EK
• Minimum Operating Temperature: - 40 C
• For Use With: AT91SAM9261-EK - KIT EVAL FOR AT91SAM926EJ-SAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

iv
AT91SAM9261S
19 General Purpose Backup Register (GPBR) ....................................... 127
20 AT91SAM9261S Bus Matrix ................................................................ 129
21 External Bus Interface (EBI) ................................................................ 137
22 Static Memory Controller (SMC) ......................................................... 161
18.3
18.4
18.5
18.6
19.1
19.2
20.1
20.2
20.3
20.4
20.5
21.1
21.2
21.3
21.4
21.5
21.6
21.7
22.1
22.2
22.3
22.4
22.5
22.6
22.7
22.8
22.9
22.10
22.11
22.12
22.13
I/O Lines Description .....................................................................................121
Product Dependencies ..................................................................................121
Functional Description ...................................................................................121
Shutdown Controller (SHDWC) User Interface .............................................123
Overview ........................................................................................................127
General Purpose Backup Registers (GPBR) User Interface ........................127
Overview ........................................................................................................129
Memory Mapping ...........................................................................................129
Special Bus Granting Techniques .................................................................129
Arbitration ......................................................................................................130
Bus Matrix (MATRIX) User Interface .............................................................131
Overview ........................................................................................................137
Block Diagram ...............................................................................................138
I/O Lines Description .....................................................................................139
Application Example ......................................................................................140
Product Dependencies ..................................................................................143
Functional Description ...................................................................................144
Implementation Examples .............................................................................152
Overview ........................................................................................................161
I/O Lines Description .....................................................................................161
Multiplexed Signals ........................................................................................161
Application Example ......................................................................................162
Product Dependencies ..................................................................................162
External Memory Mapping .............................................................................163
Connection to External Devices ....................................................................163
Standard Read and Write Protocols ..............................................................168
Automatic Wait States ...................................................................................176
Data Float Wait States ...................................................................................181
External Wait .................................................................................................185
Slow Clock Mode ...........................................................................................191
Asynchronous Page Mode ............................................................................194
6242E–ATARM–11-Sep09